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ADS7822 Leakage Current Spec Makes No Sense

Albert McGilvra
Prodigy 10 points
Other Parts Discussed in Thread: ADS7822

ADS7822 datasheet states on p10 that the minimum clock freq is set by the leakage on the capacitors internal to the ADS7822. The leakage spec is 1uA, the caps are 25pF. If the Reference voltage is 3V, then an LSB is 3V / 4096 = 0.732mV. It would only take 18nS for 1uA to leak 0.732mV off the 25pF hold cap.

That 18nS has to include 12 clock cycles for conversion, meaning minimum clock freq would be 12 / 18nS = 660 MHz ??? The stated max clock freq is 3.2MHz. Either the leakage current spec is off by a lot or it applies to something other than the hold caps. Thanks.

  • 0
    TI__Mastermind 44720 points

    Hi Albert,

    I like your analysis. The reason why the numbers don't cruch is because the leakage current is not the leakage current of the sample and hold capacitor.

    • During a conversion, the sample and hold capacitor is disconnected from the input circuitry. In this mode, it's leakage current is very low (much lower than 1uA). Still, if the conversion is slow enough this leakage will start to impact the conversion result. Hence, why there is a minimum clock frequency specified.
    • The leakage current of 1uA applies only to the input pin. Each input pin has a pair of ESD protection diodes. It is from the mismatch of these diodes that we see a leakage current. This leakage is always seen by external circuitry, no matter the ADC mode.

    Here is a simple illustration of the two modes:

    Best regards,

    Chris