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Issues regarding DAC8568

Yi Zhang1
Other Parts Discussed in Thread: DAC8568, DAC8568EVM

Hi, DAC8568(CICPW) Experts,

My system has a hardware board made from the DAC8568 as follows:

1) /LDACC: tied to ground

2) CLR tied to Vdd = 3.3V

3) V_REF connected to 18uF Capacitor with ground (so it uses the internal reference = 2.5V

4) this 6568 board communicates with an off-board DSP F2812 on SPI at ~8MHz

Issues: 

1) I was able to use command word 0x08000001 for the static mode, to get 2.5V reference voltage, but could not get the same using 0x090A000 or 0x09080000 for flexible mode

2) With above 2.5V reference, I am able to set DAC output to a desirable value on Chan A & B, but not C ~ H, no matter what commands I sent.

My code sequences are as follows:

Initialization code -

1) Software Reset (0x07000000)

2)Set Internal Reference(00x08000001)

3)Clear Code Register9(Clear All DACs to zero scale)

4)Set LDAC register to allow synchronous mode (0x060000FF) for all channels (A~H)

5)Power up all DACs (0x040000FF)

Set DAC code -

1) Write to Selected DAC input register and Update Respective DAC Register with Control code DB27(C3) ~ DB24(C0) = 0x3

2) write to Selected DAC Input Register and Update All DAC Register with Control code DB27(C3) ~ DB24(C0) = 0x1

DSP2812 SPI code :

1) tried sending both Byte and Word, no impact on the DAC channel C ~ H output results

Can any one advise or comment on the above strange behavior. Many Thanks.

Regards

YZ 

  • TI__Guru**** 181641 points

    Hi YZ,

    Welcome to the e2e community!  Can you perhaps share a screen capture of your SPI interface and let us know how you have the DAC8568 wired into your F2812 board?  Is this all one piece of your own hardware or are you using the F2812 eZdsp with our DAC8568EVM?

  • in reply to Tom Hendrick

    Hi Tom

    Thanks for your quick reply. I don't have a screen shot in my hand now, but I can explain and discuss following with you.

    1) I have used my own boards, one is the 2812 based controller, and the other is the DAC8568 based board communicated on SPI with it

    2) The SPI should work fine, as I have got the reference voltage enable right (= 2.5V). 

    3) The screen shows CLk, Data_in, /Sync, all okay(though I don't have it here, until I get back to office). When i sent it in 8-bit byte, clearly there are 4 burst spacing with a few micro-seconds with each other, /sync goes high in the end of 32clks. These should be right, or I will not be able to get DAC Chan A & B output right.

    4) checked Clk falling edge also correct. 

    My questions:

    (1) For the internal voltage reference, is there any special provision to write the command for flexible mode compared to the static mode?

    (2) Sending Write sequence for Channel C ~ H is not any different from the Channel A & B, what could be wrong causing it?

    Thanks &  Regards

     YZ

  • in reply to Yi Zhang1
    TI__Guru**** 181641 points

    Hi YZ,

    Sorry for the slow reply, but there is no special provision for flexible mode operation of the reference beyond what is shown on pages 31 and 32 of the data sheet.  The only issue I can think of that might cause errors with the channels beyond B would be related to the SPI input.  Have you managed to capture screen shots of your SPI interface?

  • in reply to Tom Hendrick
    TI__Guru**** 181641 points

    Hi YZ,

    Have you made any progress here?