I am using the ADS5400EVM (Rev D) board to drive a Xilinx ML605 board using an FMC-ADC-Adapter card (Rev C). Is there a constraints file available to map the ADC pins to the FPGA? While creating my own map I noticed that the FMC-ADC-Adapter pins on its J2 connector shown in the Rev C schematic (from slor101.zip file) don't seem to line up with the pin names on the ADS5400EVM's J4 connector (pg 21 of the userguide slau293.pdf). I would really appreciate clarification on this matter.
Thanks,
Schuyler Shimanek seshima@sandia.gov