Power Supply Rejection Ratio

Dear Mr.Dursun,

The PSRR measurements are one of the most understated parameters found in data converter datasheets out in the industry. As far as I know, there are 3 types of PSRR measurements done on ADCs and they are PSRRdc, PSRRac, and PSMR. PSRR is simply how much the gain or offset error changes as the power supply voltage is varied, while PSRRac is the measure of how much the noise floor of the converter gets affected seen in the FFT graph data by a noise source that rides on top of the power supply voltage which is more preferred on ADCs and this is the type of PSRR measured in the subject device datasheet. Just to complete the argument, PSMR is very similar to PSRRac but this time an input signal frequency is also applied to the ADC inputs.

In the datasheet, a 100mV noise signal is used to ride on the AVdd of 3.3V voltage source. The nature of the test calls for scanning all frequencies of interest and the noise source than shows up as a spur in the output FFT data. Although the PSRR so changes with frequency, since the effects of this power supply noise is the most prominent in the 1st Nyquist zone, the tests and data are collected there in this zone as it is also the case in the device datasheet.

Also remember that PSRR is also linked to the filters used in ADC power supplies, type of the supplies, PCB layout, etc.

I hope this helps.

Murat Ilhan.

murat@ti.com

Dear Mr. Ilhan,

Thank you very much for the response. Actually, I have wanted to ask the PSRRac relation with the frequency of noise, not the frequnecy of input.
You said that a 100mV noise is ride on the AVDD. Does this noise has a bandwith or is it a single-tone sinusoidal?

As it is known there is switching noise on digital supplies and frequency of this noise will be about the switching rate of digital circuits.

Assuming that this kind of noise is added to the AVDD and let assume it's frequency İs 50Mhz, then I think there will be a spur at 50Mhz on the FFT output.
Amplitude of this spur will be effected by PSRR an other supply filters as you mentioned. For example, if the power of noise is -25dBm at 50 Mhz and PSRRac is 40dB then
power of the spur(at 50mhz)  will be -65dbm. If I am wrong, please correct me.

If noise is -25dBm(at 100Mhz) then can we say that there will be a -65dBm spur at 100Mhz? I think PSRR is not constant over the Nyquist Zone, so it will be different than -65dBm.

By this point of view, relation of PSRR with the noise frequency is becoming important. Is this relation linear?

Can we say that PSRR for high frequency noise will be always higher/lower than the PSRR for low frequency noise?

Best Regards,
Mustafa DURSUN

Dear Mr. Ilhan,

Thank you very much for the response again.  The information "Worst case figure is specified in the datasheet" is enough for me and covering the answer of my question.

Best Regards,

Mustafa Dursun

Hi Mr. Iihan,

I happened to read your conversation with Mr. Mustafa when I googled on PSRR measurement for ADC.

I am looking for ways to calculate the PSRR of a ADC. May I know if I inject a 100mV sine wave (1kHz) at the power supply, I capture my digital output code, and proceed with FFT calculation. If I see a tone of -70dB at 1kHz, how do I calculate the PSRR of the ADC at 1kHz?

In addition, if I would like to plot the PSRR against various frequency, is that correct that I can only do it by keep repeating the measurement with supply noise of different frequency?

Thanks!

Best regards,

Howard Tang

E090049@e.ntu.edu.sg

Hello Howard,

The calculation of ADC PSRR is not too hard providing that you take care of some certain points. First of all, let's assume you will be adding a 200mVpp "noise" signal on top of your DC supply using your signal generator. You need to make sure neither source affect each other or the ADC (hence the measurement) in the wrong way. Since, the DC supply is needed only for its DC value and the noise signal only producing an AC signal, any AC from the DC supply and any DC from the Signal generator should be blocked. You will need a coupling inductor of say 1mH to place at the output of your DC supply and a non-polarized coupling cap of say 100uF at the output of your signal generator. You may then input both of these signals to your ADC supply pin via a coupling resistor as needed. Take a note that you need to repeat this test for each of the supply pins of the ADC in case there are multiple supply pins of the ADC you are taking the measurements for.

You need to calculate the offset value you will be seeing in the FFT curve. It is simply 20log(VinNoise/Vfullscale). Suppose your ADC has 2Vpp fullscale voltage then this figure becomes 20log(200mVpp/2Vpp) or -20dB. Measure the ADC supply pin AC signal using your O'scope to make sure your input checks. By the way, you need to short your ADC inputs to clean ground for these tests. In the FFT curve, you will see a spur at the frequency of interest but make sure to subtract this offset value to find the PSRR. If you see a -90dB spur then your PSRR will be -90 - (-20) = -70dB. You need to repeat this test for all the frequencies of interest and perhaps together with the amplitude as needed.

Now you need to watch the LC filter network resonant frequency because as you are varying the input frequency this LC network will start affecting your signal input network. You will need to modify these LC components to a different frequency by perhaps using a smaller and smaller value coupling cap as you are testing for those frequencies close to the resonant frequency of this LC network.

You also need to watch for the supply pin to make sure the supply gets the necessary DC value. You will see that as you are modifying the input frequency of your AC source, this DC voltage coming to the ADC supply pin will change. You will need to compensate for this by playing with the DC value of your supply as needed.

I hope this helps.

Murat Ilhan.

Hi Mr. Ilhan,

Thanks for the valuable information!!!

Cheers,

Howard

Hi Mr Ilhan,

By the way, I have done the measurement over the weekend.

My ADC is a 10-bit SAR ADC. The power supply is 0.9V with a input signal range of 1.8Vp-p. I inserted a 180mVp-p sinusoidal source to the power supply. In the worst case performance, I have recorded a PSRR of -72dB which is around 0.23LSB. Do you think this performance is sufficient for 10-bit application?

Cheers,

Howard

Hi Howard,

I am glad that you have completed your tests already. You did short the ADC inputs during these tests, correct?

Looks like you are using a bipolar supply of +0.9V, -0,9V that makes a 1.8Vpp supply voltage and the -72dB rejection you got is a reasonable and a good value.

For your application you have to make sure all your noise and distortion sources combined will not be more than 1LSB or even better to keep it below 0.5LSB theoratically speaking. PSRR is your "noise" riding on your power supply but how about the noise riding on your input signal and the noise on the Vref (if you are using external ref supply). You have to consider all these noise sources and depending on the accuracy you need from the ADC, you can then determine the resolution you need from your ADC.

It is also better to calculate going the other way, that is, find your 1 LSB and then going backwards you can calculate the amount of noise you can tolerate on the power supply, Vref, and the input pins. Last but not the least, your layout design will be very important for your overall system performance.

I hope this helps,

Murat Ilhan.

Hi Mr. Ilhan,

Ya, I short my input to the common mode voltage and I used a bipolar supply.

Thanks for your valuable comments!

Cheers,

Howard

Very well Howard.

I am glad to have helped.

Take care,

Murat Ilhan.