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Offset difference ADS1248

Hielke Bakker
Prodigy 70 points
Other Parts Discussed in Thread: ADS1248, ADS1247

We are using the ADS1248IP ADC for one of our designs. We have implemented it as a PT100 temperature sensor interface as describe in the Application report “Example Temperature Measurement Applications Using the ADS1247 and ADS1248” page 3. We implemented three of these devices on one PCB board.

We have made 4 prototype boards. On every board there are 3 ADS1248. Every ADS1248 measures two PT100s.  In place of the normal PT100 we put a high precision 0.05% resistor to simulated a PT100 at 0oC (100ohm = 0oC ).  When we measure  the temperature we see that between the ADS1248 the values deviates from -0.580C to 2.540C. What can be the reason for this deviation. Or do we need to calibrate for this offset.

Some additional information

-          We are using the ads1248 in a three wire  PT100 configuration.

-          IDac = 500uA

-          PGA = 32

-          Sample rate = 160 SPS

-          Vrefcon = only by conversion

-          Rcomp = 110 ohm 0.1%

-          Rvref = 820R 0.1%

-          Avdd and Dvdd = 3.35V, switching power supply 1mHz switching frequency

Thanks for your help.

  • 0
    TI__Guru 55466 points

    Hi Hielke,

    Are the deviation errors fluctuating or constant?

    -- If the offset errors are fluctuating and not constant, the errors could be due to other sources of noise that could be disturbing the measurement.  A general recommendation is to use stable/quiet linear supplies in high resolution applications.  A general recommendation for high resolution applications is to place a linear regulator with high PSRR between the switching supply and the AVDD (and/or DVDD) supplies of the device to reduce any switching supply ripple, place bypass capacitors in close proximity to the ADS1248 supply pins and also isolate the analog sensitive signals from the switching supply circuitry in the board layout.

    -- An RBIAS resistor of 820 Ohms is currently being used.  If the 3-wire configuration is used with IDAC1 and IDAC2 set to 500uA; this will produce an external reference voltage across VREFP and VREFN of 1mAx820Ohms=~0.82V.  A possible suggestion may be to increase the RBIAS resistor to produce a larger voltage reference of 1.5V to 2V in this case to improve the noise performance.

    -- The VREFCON settings above show that the internal reference is only enabled during the conversion.  Therefore, the IDAC currents are enabled and disabled between conversions.  The internal reference and the IDAC current sources should be allowed enough time to settle.  The settling time of the internal reference is a function of the VREFOUT capacitor.  Table 10 shows the internal reference settling times versus the external VREFOUT capacitor.  If the application has strict timing requirements, a possible alternative may be to change the settings to ‘internal reference always on’.

    If the offset errors are constant; there are a couple of procedures that may be performed to correct for offset errors. 

    1)      After configuring the device on the selected channel, IDAC current settings, PGA gain and allowing the internal reference and all the analog circuitry to settle, a self-offset calibration (SELFOCAL) calibration may be performed.  By sending the SELFOCAL command the selected inputs are disconnected from the internal circuitry and a zero differential is applied internally.   The device will update the OFC registers internally and correct for the internal offset of the device. Page 32 of the ADS1248 datasheet provides more detail about this procedure.

    2)      The 3-Wire configuration requires the RTD wiring and the traces in the IDAC1 and IDAC2 current path to be closely matched.  The IDAC1 and IDAC2 current mismatch spec is typically 1% (max 6%).  After performing the SELFOCAL calibration, any mismatch of the IDAC current sources could be corrected using the attached procedure.  The IDAC1 and IDAC2 could be alternated on AIN(+) and AIN(-); and by performing two measurements and averaging the results, any small errors due to IDAC mismatch can be corrected.  Please refer to the attached procedure.

    5482.IDAC_Mismatch correction.pdf

    Please let me know if the issue continues;  if possible, please provide the detailed schematic and board layout.

    Thank you and Best Regards,

    Luis

     

  • 0 in reply to Luis Chioye
    Prodigy 70 points

    The error was constant. But thanks to you the problem is solved now. We did what you suggested and switched the IDAC1 between AIN + and - , and averaged the result. Then all the channels where more or less  in the same range. The only thing was that the channels were about 1,50C to high. This was due to the fact that the Rcomp was a 1% instead of a 0.1%. After measurement it was 109,5ohm and there we found the offset of 1,50C.

    Thanks for your help.