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CD54HC73 Startup conditions?

Other Parts Discussed in Thread: CD54HC73

Greetings and Merry Christmas;

I have a circuit that requires a jumper setting to determine start up state for an output and then toggle of output state on a switch input.

We have done this in the past using a pair of 4093 AND gates but I wanted a smt part and cd4093's are not available in smt.

I tried using a JK flipflip (cd54hc73) with a RC (10K 1uf) using the cap connected to either the !CLR or the J & K Pins on the chip (the JK pins have a dedicated 10K and the CLR pin has one as well).

It does not work consistently.

Where did I go off the rails? Wrong flipflop?  The logic tree for the JK gives me an alternating output condition on CLK with both J & K tied Hi.

This works IF I can get it to power up in the state desired.

Thanks!

  • It may be beneficial to see a schematic and power up timing scope shots to fully understand your issue.

    However if my interpretation of the issue is correct, the flip flops ability to power up in a predetermined state (0 or 1) is not predicable. 

    Regards,

    Wade