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ADS1118 design

Enrico Braidotti
Prodigy 40 points
Other Parts Discussed in Thread: ADS1118

Hi all,

 

I am evaluating to use the ADS1118 ADC for a small design and production (about 200 pcs) where I need two differential channels for each board. I need to choose the ADC in no more than 2 days...

I want to connect the negative inputs AINn to 2.5V reference and the AINp pins will span from GND to 5V. The VDD voltage would be 5V and I would use a PGA gain of 1 in order to have a +/-4.096V full-scale. Would that work ok?

Alternatively, I can use AIN3 tied to 2.5V reference and use AIN0 and AIN1 as the input channels spanning from GND to 5V right?

Other issue is about the SPI reading: I would like to read data in continuous mode and I want my microcontroller to act as a master (and decide when to read). So, if I configure the ADS1118 to work in continuous mode at 860 SPS, I would just use the C\S\ pin at the same frequency in order to get data from the ADC.

Any issues, advices and so on on that?

Thanks in advance,

             Enrico

  • 0
    TI__Guru** 113765 points

    Enrico,

    You can use the ADS1118 in the manner described.  One thing to remember is the data rate is based on the internal clock oscillator speed and this can vary from part to part.  You need to make sure that the data you read is for the channel selected, as the output data will always be the most recently completed conversion.

    I generally either use an interrupt driven system where I read the data on the falling edge of DOUT/DRDY or I poll DOUT/DRDY to make sure the conversion is complete.

    Best regards,

    Bob B

  • 0 in reply to Bob Benjamin
    Prodigy 40 points

    Hi Bob,

    How to poll drdy pin since it is multiplexed with dataout pin. We use dout pin in spi interface.

  • 0 in reply to Bob Benjamin
    Prodigy 40 points

    Hi Bob,

    How to poll drdy pin since it is multiplexed with dataout pin. We use dout pin in spi interface.

  • 0 in reply to shravan malagihal
    TI__Guru** 113765 points

    Hi Shravan,

    It is usually better to ask a new question on a new post to make sure your question gets answered.  Old postings can get overlooked.

    To answer your question, the data communcation cycle is 4 bytes.  The first two bytes are the conversion results and the second two bytes are the configuration register settings.  The least significant bit for the configuration register is always a '1', which means that the communication cycle ends with DOUT high.  Using the pin as both DOUT and DRDY simply means that when the conversion cycle ends, the DOUT pin gets set low.  So when you see the high to low transition, you know that the conversion is complete and the results are ready to be read out.  You can see the behavior in Figure 45 of the ADS1118 datasheet.  Also remember that CS must be low so that the DOUT/DRDY pin is not tri-state.

    Best regards,

    Bob B