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SCLK not outputting?

hj
Intellectual 650 points
Other Parts Discussed in Thread: ADS1244

Hi, Im using the ads1244 and we have scoped DOUT and SCLK and it looks like DOUT is outputting data, but SCLK isnt doing anything.  We have this attached to a PIC, which is acting as the master.  I guess i have questions about SCLK and how to set it high and low?  Or what should we expect to see?  Also can the ads1244 act as master?

  • 0
    TI__Guru** 113765 points

    HI HJ,

    The ADS1244 is a SPI slave only device.  You will need to provide the SCLK from the micro.  There are a couple of ways to do this.  If you use the SPI peripheral of the micro, then you need to setup the micro to have SCLK dwell low on idle and read data on the falling edge of the clock.  To initiate the SCLK you would write to the transmit buffer to initiate the clocks.  This sounds a bit strange as the ADS1244 has no data input for the SPI.  You just leave the MOSI pin floating in this case.

    Another way to communicate is to bit-bang GPIO ports.  This is sometimes preferred to force the DOUT pin high which requires 25 clocks (or to start calibration which requires 26 clocks.)  With this method you just write a series of clocks by manually changing the output pin designated as the clock and toggling it from low to high and back to low.  Another GPIO pin is connected as an input (DOUT from the ADS1244) and when the clock returns to low you read the state of the input pin.

    Best regards,

    Bob B

  • 0 in reply to Bob Benjamin
    Intellectual 650 points

    Thank you, that's very helpful.

    It took me a while to realize that we need to write to the buffer in order to initiate SCLK and SPI communication.  If thats the case, does that mean we dont even need to touch the SCLK pin to set it high or low?

  • 0 in reply to hj
    TI__Guru** 113765 points

    Hi HJ,

    If you use the SPI peripheral of your controller, then once it is initialized (configured) correctly you don't need to worry about the SCLK.  A write to the buffer will initiate the SCLK and once all the clocks have been issued for a byte of data, then you can read from the receive buffer.

    Best regards,

    Bob B

  • 0 in reply to Bob Benjamin
    Intellectual 650 points

    Okay - one more question--

    Earlier i think you said that we can force DRDY to go high until another transmission is ready.  Do I just need to write something to the buffer?  Or should I just set DOUT (connected to pic chip) to be high?

    Also how do i hold sclk low?  The data sheet seems to talk about that a lot.  

  • 0 in reply to hj
    TI__Guru** 113765 points

    Hi HJ,

    Yes, you can force the output high by sending an extra clock, or start a calibration cycle with two extra clocks.  When you use the SPI peripheral it is difficult to send just one clock, and that is why the bit-bang solution is often used.  If you issue a fourth byte, then you will also issue the calibration.  Forcing the output high is generally used when polling the output to see if new data is available.

    If you want to know when the next conversion cycle is complete while using the SPI peripheral, then it is best to wire the output not only to the peripheral but also in parallel to another GPIO that can be used as an interrupt.  The interrupt is set to trigger on a negative (high to low) transition.  You capture the data within an interrupt service routine.  Within the interrupt routine, you disable the interrupt while reading the data results and turn it back on again just before exiting.

    Best regards,

    Bob B