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ADS1243-HT : RREG command : Can I issue the command one time and keep reading out the register value to poll the DDRY bit status?

Yuquan Li1
Intellectual 460 points
Other Parts Discussed in Thread: ADS1243-HT, ADS1243, ADS1248

A/D Converter: ADS1234-HT The RREG command: I need to issue the command to read out and poll DDRY bit status. Can I issue the command one time and keep reading out the register value to poll the DDRY bit status? Or I need to re-issue the command every time I read the same register and retrieve the DDRY status?

 

  • 0 in reply to Yuquan Li1
    TI__Guru* 97975 points

    Yuquan,

    Yes, table on page 10 of the datasheet specifies the timing from the SELFCAL to the rising SCLK of the next command.

    Joseph Wu

  • 0 in reply to Joseph Wu
    Intellectual 460 points

    then, after issuing self cal command, we need to wait at least 4 DRDY to issue next command. That means after self cal is done,  there will be 3 additional waiting before issue next command?

    Timing is critical for us. we have to command to check DRDY status. Hardware design does not provide DRDY pin access.

    Thanks

  • 0 in reply to Yuquan Li1
    TI__Guru* 97975 points

    Yuquan,


    Ok I see the confusion.

    Once the ADS1243 is given a SELFCAL command, the DRDY will rise to indicate that the data is not ready. The amount of the time that this will stay high is 4 DRDY periods (or the amount of time is 4 times what it would take to normally get one data reading). If you look at the Timing diagram on page 10, on the second figure, this is tDATA.

    During this time, it will have gone through a SELFOCAL and a SELFGCAL, which would have normally taken 2 tDATA periods a piece.

    Once the device has completed the SELFCAL, /DRDY will return low, indicating that data can be read from the device.

    I would also point out the last sentence of the Calibration section of the datasheet. It states that at the completion of calibration, the /DRDY signal goes low indicating the calibration is finished. The first data after calibration should be discarded since it may be corrupt from calibration data remaining in the filter. The second data is always valid.

    That means that after calibration you will have to wait 5 x tDATA before reading out useful data. Or you can scan the /DRDY. After calibration, wait for the /DRDY to go low and then wait one more pulse of /DRDY to read out the data.


    Joseph Wu

  • 0 in reply to Joseph Wu
    Intellectual 460 points

    Thanks for clarification.

    Yuuqna Li

  • 0 in reply to Joseph Wu
    Intellectual 460 points

    I need to write command to AD converter to read out DDRY status.

    t11 on Page 11 says after one command input, we need to wait t11 to issue another command.

    We also know, 4xtDATA is needed to complete SELFCAL.

    After writing SELFCAL command, do I need to wait t11, which is 4xDATA and then issue command to check DDRY status?

    Or right after writing SELFCAL command, I can immediately issue another command to check DDRY status?

  • 0 in reply to Yuquan Li1
    TI__Guru* 97975 points

    Yuquan,

    After writing the SELFCAL, you need to wait the full 4 DRDY periods to issue another command to the device.

    However, checking /DRDY is not a command. You can check /DRDY at any time. Is there a command that you think you need to issue immediately after the SELFCAL?

    Joseph Wu

  • 0 in reply to Joseph Wu
    Intellectual 460 points

    yes, I need a Register reading command to read out register and from the register to check the DRDY bit

    In my case, checking DRDY is done by command, since our hardware design does not have the DRDY  pin checking capability

  • 0 in reply to Yuquan Li1
    TI__Guru* 97975 points

    Yuquan,

    Checking the DRDY would be a command for your micro, but it does not require a direct command for the ADS1243. Regardless, you do need to wait the full 4 DRDY periods to clock out data after the SELFCAL. The 4 DRDY periods are used for internal measurements to get the proper offset and gain. During this time, there are no measurements being made and you can't read the ADC.

    Joseph Wu

  • 0 in reply to Joseph Wu
    Intellectual 460 points

    The DRDY  is  bit7 of ADC 's internal register with address 0x02.

    To access this register, we need micro to send command to ADC. The command is "RREG–Read from Registers" on page 29. Is that true? 

    My interpretation is that, after micro sending self cal command, we ween  wait 4xTdada and before issuing any other command.This includes command of  "RREG–Read from Registers" 

    What is your comment?

    thanks

  • 0 in reply to Yuquan Li1
    TI__Guru* 97975 points

    Yuquan,

    Ok, I understand now. I thought that you were using the /DRDY pin as the indicator. Sorry about that. You should be able to read /DRDY status with register 0x02.

    For the RREG command, you should still wait the 4 DRDY periods after the SELFCAL. If you send the RREG command before the end of the time period, the SELFCAL is interrupted and will not complete.

    Joseph Wu

  • 0 in reply to Bob Benjamin
    Intellectual 460 points

    Hello: Two questions:

    Quote" As long as the ADS1243-HT is powered, has an appropriate clock and the PDWN pin is logic high the converter will be converting.  This can be verified by probing the DRDY pin.  DRDY should be pulsing at the appropriate data rate."

    Question 1: I believe the AD will converter according to the default channel, gain setting etc. It that right?

    Question 2:

    in my case, after I turn power and clock on for AD converter, then I issue the signal channel, gain and other settings, after that, I read back these settings, if they are right, then :

     I used to issue Synchronization  command, after that,  check DRDY, if it is ready( do not take its data), then wait and check another DRDY , if this DRDY is ready, then take this data. It works

    Now, I need the AD to run faster. Immediately after setting up, I do not issue Synchronization  command. Instead, after issuing the setting command, I wait and check  DRDY , if it is ready( do not take its data), then wait and check another DRDY , if this one is ready, then take the data.  WILL this work?

    Thanks

    Y.L

     

     

     

     

  • 0 in reply to Yuquan Li1
    TI__Guru* 97975 points

    Yuquan,



    1. I believe that Bob has answered the first question for you already in this previous post:

    http://e2e.ti.com/support/data_converters/precision_data_converters/f/73/t/254868.aspx


    2. I think the way you describe it will work, but I think the fastest way to do it is to turn the device and the clock on, set the settings, and then issue the DSYNC command. Then immediately issue a dummy command, like reading a register. This way you restart the digital filter immediately. Then you can use the first data read after the /DRDY goes low.I believe this should be the fastest solution. You can test it out, but it should work.



    Joseph Wu

  • 0 in reply to Joseph Wu
    Intellectual 460 points

    Can I do this?

    After setting up, issuing  DSYNC command, then immediately read DDRY info through digital command, until DDRY goes low, then we take data?

     

    From what you described, this should work. Is that right? 

     

     

     

  • 0 in reply to Yuquan Li1
    TI__Guru* 97975 points

    Yuquan,


    That should work. After setting the device to the proper configuration the DSYNC command should reset the digital filter so that it only includes input that is taken in that configuration.

    Joseph Wu

  • 0
    Intellectual 460 points
    AD1243 HT:


    Hello:

    I got a voltage divider. the VREF(+) = 1.9V VREF(-)=0V

    The differential input: ANI1(+) =3V, ANI0(-) = 1.9V. This the differntial input voltage =1.1V< VREF
    The Gain setting =1

    Analog power =3.6V

    What I got from AD converter is saturation. Any reasoning?

    Thanks
    Y.L
  • 0 in reply to Yuquan Li1
    Intellectual 460 points
    resolved. It has to do with range selection