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Line Buffer for DAC5662 with f_clk=48MHz

Other Parts Discussed in Thread: DAC5662A

Hey there,

I want to operate a DAC5662A with a clock frequency of 48MHz. The clock and the data comes from motherboard equipped with a Xilinx FPGA and the DAC will be on a analog I/O daughtercard.

I searched for non-inverting line buffers to put between the FPGA and the DAC. I found the SN74LVCH16244, but in the datasheet it is only stated that f_OE,max = 20MHz, but there is nowhere written how fast the inputs are allowed to be switched.

Which part would you recommend for this application? Is there any faster 16bit line buffer?

Regards,

Andreas Arnold