ADS7263 How to Use Part II

Sadanori Kato

Other Parts Discussed in Thread: ADS7263, TMS320C28346, ADS8363, ADS8361

Hi,

We have obtained questions of ADS7263 from our customers.
Could you please tell us as follows as soon as possible?

Q1. the Method to Connect to Device Controller
Could you please tell us the recommended method to connect to device controller by using SDOA and SDOB?
We consider to use TI products as the controller device.
For example, if we use TMS320C28346, how should we connect to this device by using SDOA and SDOB?
Please explain to us with reference to schematic diagram.

Q2. Input Voltage Range and External Pin Settings
We would like to use 5V as input voltage range in the pseudo-differential input mode.
Are the conditions(table 13. Output Data Format) described in the 28 pages of data sheet pseudo-differential input mode?
Moreover, we found that the description of "CHxxN = VREF = 2.5V".
In this case, should we connect CHxxN to REFIO1(or REFIO2)? or should we connect CHxxN to external voltage reference?
If we don't connet CHxxN to REFIO1(external voltage reference), is input voltage range 0V to +VREF?

Q3. the Performance Half-Clock Mode and Full-Clock Mode
When the full-clock mode is compared with the half-clock mode, is there any difference in performance?
We know that there is a difference with respect to INL and DNL for ADS8363.
How do you think about ADS7263(for example : INL, DNL, SINAD, SNR, THD, SFDR, etc.)?

Q4. Power on/off Sequence
The ADS7263 has two separate supplies(DVDD and AVDD).
Could you please tell us the recommended power-on and power-off sequence?
For example, should we supply the voltage to DVDD and AVDD at the same time?

Best Regards,
Kato

over 10 years ago

0 Tom Hendrick over 10 years ago

TI__Guru**** 168725 points

Hi Kato-san,

I do not have a schematic readily available to show you how to connect the ADS7263 to the TMS320C28346, In principle though, you could connect the two McBSP ports together (one as a master device and the other as a slave). The master CLKx would be directed to the ADS7263 and the master/slave CLKr. The Dx output from the McBSP master would go to SDI on the ADS7263. The SDOA and SDOB outputs from the ADS7263 would be directed to Dr on both the master and slave McBSP ports.

For the input voltage range question, please review this post: http://e2e.ti.com/support/data_converters/precision_data_converters/f/73/t/277352.aspx I'll work that detail into an application note as well.

I'll double check on the DC performance of the ADS7263 with respect to the INL/DNL, but I believe all of the AC parameters (SINAD, SNR, etc) are valid in either full-clock or half-clock mode. I'll verify that and let you know if there are any differences.

By the ABSOLUTE MAX ratings table on page 2 of the data sheet, you can see that the DVDD supply has a limit of 1.2x with respect to the AVDD supply. If you sequence the supply rails together, that would be fine. Otherwise, ramp AVDD first followed by DVDD on power up and bring DVDD down ahead AVDD on power down.

0 Sadanori Kato over 10 years ago in reply to Tom Hendrick

Guru 36490 points

Hi, Tom-san,

Thank you for your information and moving our posts.
We have several questions.
Please tell us as follows.

Q1. the Method to Connect to Device Controller

We understood that the TMS320C28346 is available as controller device of the ADS7263 by using two McBSP.
Then, please explain to us the connection between ADS7263 and TMS320C28346 in detail.
Moreover, when we use TMS320C28346, is the errata of this device problem?
Could you please advise us about it?

Q2. Input Voltage Range and External Pin Settings

We checked the ADS8363 in pseudo differential configuration that you informed us.
So, we have questions to you.
Could you please tell us 3 setting methods the pseudo-differential mode operation in detail.
For example, in the case of "common-mode source = internal mux = VREF",
the CMx pin is floating, the CHxxN is connected REFIOx into internal path by using the register settings.
Moreover, could you please tell us these register settings?

Q3. the Performance Half-Clock Mode and Full-Clock Mode

Thank you for your cooperation.
We are looking forward to reply from you.

Q4. Power on/off Sequence

We will inform to our customers that please supply the voltage to DVDD and AVDD at the same time.

Because our customers are in trouble, could you please tell us about them as soon as possible?

Best Regards,
Kato

0 Tom Hendrick over 10 years ago in reply to Sadanori Kato

TI__Guru**** 168725 points

Hi Kato-san,

For connecting the ADS7263 to your processor, please take a look at an application note that interfaced the ADS8361 to the TMS320F2812. The ADS8361 was an earlier version of the ADS7263, but you can see the general connection on page 6, Figure 5. I do not know about the specifics of the errata for the TMS320C28346 processor, but I do not see anything in section 4 of that document that would have an impact on the McBSP operation. The ADS8361 had an address select pin called A0, which was replaced by SDI on the ADS7263, so the connection would remain as shown in the app note I mention above.

In Pseudo Differential mode, there is no CHxxN - that nomenclature is used when the device is configured for full differential operation. Table 13 is written for full differential mode where the CHxxN pin is tied to +2.5V and the CHxxP pin is swung from 0-5V. In Pseudo-Differential mode, the eight input channels are CHA0 through CHA4 and CHB0 through CHB4. The four channels on the 'A' mux can use the CMA pin or the internal reference, the same is true for the four channels on the 'B' mux.

At a minimum, you have to write to the configuration register to enable PD mode via bit 6. You also have to access the REFDACx register by setting bits A[3:0] in the configuration register. You then have to enable the enable the REFDACx output by clearing the RPD bit (Bit 10). You could then tie REFIOx to CMx which is the default configuration for the REFCM register.

I also confirmed that there is no significant difference in AC performance from half to full-clock operating modes.

0 Sadanori Kato over 10 years ago in reply to Tom Hendrick

Guru 36490 points

Hi,

Thank you for your information.
The Q1 becomes clear.
But, because we will check, consider about the Q2, please give us a little time.

Best Regards,
Kato

0 Sadanori Kato over 10 years ago in reply to Sadanori Kato

Guru 36490 points

Hi, Tom-san,

Thank you for your cooperation.
We have read your comments, understood it regarding the Q2.
If we obtain any question from our customers, could you please advise to us?
Thank you so much.

Best Regards,
Kato

0 Masaharu Katayama over 10 years ago in reply to Sadanori Kato

Expert 1420 points

Hi Tom,

I take over #2 question from Kato-san.

I understand three cases in below.

http://e2e.ti.com/support/data_converters/precision_data_converters/f/73/t/277352.aspx

The customer will set

CONFIG PDE (bit6) : 1 (4 x 2 Pseudo)

REFDACx setting (bit 9:0) : 3FF (Vrefout=2.5V)

REFDAC RPD (bit10) : 0 (Enable internal reference path)

therefore is case1 the answer?

And I would like to make sure if CMA and CMB pins are connected to some analog voltage, it will be ignored at the case 1?

And I hve another confirmation of typo in the SBAS523B on page 23, is it 3FFh (2.5v nom) not 1FFh of the bit[9:0] description, isn't it?

Best regards,

Masa Katayama

0 Tom Hendrick over 10 years ago in reply to Masaharu Katayama

TI__Guru**** 168725 points

Hi Masa,

Yes, that is correct. We'll get the typos corrected as soon as possible, thank you!

0 Masaharu Katayama over 10 years ago in reply to Tom Hendrick

Expert 1420 points

Hi Tom

Thank you very much for the answer.

I wouldl ike to doble check.

if the below table works for our input signal condition, Unipolar (0 ~5V) using internal refernce (2.5V).

and if it is same for ADS7263 as well sa ADS8363

http://e2e.ti.com/support/data_converters/precision_data_converters/f/73/t/277352.aspx

Best regards,

Masa Katayama

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ADS7263 How to Use Part II