AFE4300 Phase Error

David,

When you went from 40 degrees to 90 degrees was your first calibraton using 4.7 ohm and 22 ohm resistors for calibration then calibrated with 90 and 110? Or were all 4 resistors installed on your board at one time? If all 4 were installed, is the value given your effective resistance since only 2 resistors are used for calibration.

Yes, I have 4 resistors installed on the board, and values given were the effective impedances seen by the AFE4300. I did only measure the phase of the reference resistors, which ideally should be the same (since it's mostly a phase shift from the chip itself), right?

However, I discovered a problem with the DAC, which produces a very noise, and partly deformed signal. Replacing the AFE4300 solved that problem and greatly increased the measurement accuracy. My problem still remains, though it's not as bad anymore. 

To give an current example:

Ref-Res-Value in ohms	4.7	22	90	110
Phase (atan(Q/I) in deg	-28.08	-31.47	-32.66	-32.73

I interpretate this data as following: the inherent phase shift (which later should be substracte from the actual measurement) is aroud -32°. When measuring small impedances, however, this is not the case anymore and it becomes difficult to measure the phase accurately.

I guess a phase error of max. 5° isn't the end of the world, but still bothersome.

Hi David
I am also working with AFE4300, i need your help for I Q mode i just want to how can you get phase value in negative
for example
Ref-Res-Value in ohms 4.7 22 90 110
Phase (atan(Q/I) in deg -28.08 -31.47 -32.66 -32.73

i mean how much i and q adc steps you get from AFE4300 and what was you config setting to achieve this values

Hi Imran,

The excitation current generated by the AFE comes out of the AFE, flows through the external impedance network and again goes inside the AFE.
Inside the AFE, the received signal is demodulated based on internally generated clock. The received signal may not be in phase with the internal reference signal due to some board parasitics. This could be the one reason for the negative phase for the resistors.

But as long as you are doing calibration, this phase can be corrected by subtracting it.

Regards,
Prabin

Thanks for the reply,
Here i know how excitation current goes through body or if we take standard resistor capacitor network, my question was related with adc steps which we are getting from IQ demodulation technique i channel adc steps and q channel adc step according to pdf we are not getting adc steps for Q channel its different than pdf adc steps (pdf sbaa202). we got 31889 adc steps for 515ohm resistor series with 0.1uf capacitor

I am stuck on this section how can we achieve the below output , after setting 64Khz DAC frequency and sampling rate 64sps using double ended output A1- A2, after all this i got phase value of reference resistor R1 948ohm is 31955adc steps and RC network where R =515ohm , c=120pf i got 32650 adc steps how can we achieve below phase I channel and Q channel output.

SBAA202–October 2013 Impedance Measurement with the AFE4300

For example, the two reference resistors remain the same. Injecting a 64-kHz frequency current and
setting the data rate of the ADC to 64 SPS , the ADC code for I channel of reference resistor Rx was
7625, ADC code for Q channel for reference resistor Rx was –4096. With Equation 2, the magnitude code
is 8655 and the phase is –28.24°. Considering the same series RC network mentioned in Section 2.1, the
ADC code for I channel was 6153 and the ADC code for Q channel was –3649 and based on Section 2.1,
the magnitude code was 7154 or 0.07697 × 7154 – 0.026 = 550.62 Ω and the phase was –30.68°. The
compensated phase of the sample series RC network becomes –30.68 – (–28.24°) = –2.44°. The
theoretical magnitude and phase of the sample RC network is 549.96 and –2.33°. Hence the % error for
the magnitude is –0.12 % and the relative error for the phase is –0.11°error