Hi,
I went on to interface the ADS54RF63EVM board and DAC34SH84EVM board with a Xilinx Virtex 6 ML605 board.
1. I am using the 19.2 MHz crystal source inside the DAC34SH84 to generate a 270 MHz clock for both the DAC board, and FPGA board. I am using this clock inside the FPGA to send to the ADC board, to use at it's clock.
-- Is there any problem with this ?
2. I am using a 3 Mhz, 1 V p-p sine wave to send to the ADS54RF63EVM board, and I expect a sine wave output at the oscilloscope at the DAC output.
-- But, what I observe is a waveform (non-sinusoidal, 22 MHz, 2.2 Vp-p) which does NOT change with any change in the input frequency !
-- This waveform remains even after I switch of the ADC input. Could you give me any help in suggesting why this could happen?
-- Once I remove the ADC clock (which is coming from FPGA), the waveform is not there. Does this mean that there is some sort of clock leakage ?
Thanks a lot in advance,
Basil