Inquiries regarding error descriptions on DAC7554

Hi Okui-san,

Atsushi Okui said:

1) When referring page 3, the term "Zero-scale error" is defined. Please let us clarify the difference between this and Offset error.

Please refer to: DAC Essentials: Static specifications & linearity if you need a different explanation please let me know.

Atsushi Okui said:

2) When using this device, we will need to use 1 external reference to have alignment on all 4 output channels. However, we assume that there are additional concerning on error variation per each channel. If we should take care of this situation, could this device not be the suit solution?

The channels are not able to be well matched without software calibration, which is not a trivial approach. This will be the same for other devices as well.

Software calibration, involves measuring the performance of each channel and then creating an equation that will compensate for the offset and gain errors of each channel.

(Code)*(Gain Calibration) + (Offset Calibration) = (Calibrated Code)

The calibrated code is the value that is written to the DAC. The DAC will lose some end-point codes due to the calibration. The calibration is usually done by the MCU communicating to the DAC, but you can also take a look at the DAC7716 which will store and apply the calibration values after you measure them.

If this is something you may be interested in, I can give you some more details in this approach.

Mejia-san,

Thank you for your reply on the inquiries from our customer.

With regarding to item 2, we have one additional inquiry.

Please refer to the item below, and feedback us with your comment.

Unfortunately, it is difficult for us to implement calibration software, since we are not using MCU, but only FPGA.

Meanwhile, we assume that the following aspects could be taken in consideration for gain and offset error between each channel of DAC7554.

1) Gain error

When referring Figure 34. Typical Resistor String, the tolerance of embedded resistor seems to effect on gain error. Therefore, it seems that the gain error (±0.15%FSR：MAX) includes the error between each channel.

2) Offset error

When referring Figure 33. Typical DAC Architecture, the each offset seems to be equal to the offset on each buffer amplifier. Therefore, it seems that only we could do for this case is to add offset adjustment circuit on each output channel.

Please let us know if you have any suggestion or reference for this case. 

We thank you once again for your information.

Best regards,

Hello Okui-san,

Atsushi Okui said:

1) Gain error

When referring Figure 34. Typical Resistor String, the tolerance of embedded resistor seems to effect on gain error. Therefore, it seems that the gain error (±0.15%FSR：MAX) includes the error between each channel.

Although some gain comes from the resistor string, most of the gain error comes from the gain setting resistor in the output of the amplifier.

The gain error value of ±0.15%FSR on the Electric Characteristics table is referring to the maximum error from the ideal of any single channel. This means that between any two channels the maximum gain error is ±0.3%FSR.

Atsushi Okui said:

2) Offset error

When referring Figure 33. Typical DAC Architecture, the each offset seems to be equal to the offset on each buffer amplifier. Therefore, it seems that only we could do for this case is to add offset adjustment circuit on each output channel.

Yes. The offset of each channel is due to the output amplifier. This can indeed be adjusted using external circuitry, but it is FAR more complex than the software approach. (It usually requires at least one more DAC and an amplifier.)

Usually the hardest thing to do is to measure the output of each channel before calibration. This is required by both methods, software AND hardware. Hardware calibration is almost only exclusively used to obtain a true zero.

I would strongly suggest the software calibration over the hardware calibration. Software calibration can usually be done using an FPGA. If you can share some more details of the application we can come up with a good solution for you.

• Is true zero a critical part of the application?
• Does the number of components matter?
• Is there a negative rail available?
• Any other application specific requirements?

Hello, thank you for your prompt reply.

With regard to your question above, please refer to my comments as below;

- Is true zero a critical part of the application?

=> Actually, they would like to add offset on output voltage. The important thing for considering offset and gain error between each channels is to add accurate offset voltage on output.

- Does the number of components matter?

=> Actually, this is the first trial for them to use multi channel output DAC. If it will be clear that they could not use multi channel output type, they would use single output type. This means that the number of external components should not be more than the number of components in case using 4 single channel DAC.

- Is there a negative rail available?

No, only 0~5V output from DAC7554.

- Any other application specific requirements?

They are also going to use XTR111. My other post on the thread below may help you understand their specific requirements for adding offset on output.

http://e2e.ti.com/support/amplifiers/precision_amplifiers/f/14/p/346882/1216699.aspx#1216699

We thank you once again for your information.

Best regards,

Hello, thank you for your continuous support towards the inquiry regarding DAC7554 from our customer.

With regard to your questions above, please see my comments as below;

1. Voltage output range is 0~5V. Sorry, but my comment on past post was not correct.

   They are not willing to add any offset on DAC7554 output.

2. I assume that the code range you mention stands for the digital input range on DAC7554 input. On this case, the range is 0~4095.

3. The most critical thing when using DAC7554 is offset error. They are at the stage of making estimation whether the error could be in spec of their application. This application is industrial PLC.

4. In accordance with their experience, they have not used voltage output DAC, but only current output type. Therefore, they are getting nervous against offset error to use voltage output type. (On current output type, they did not make offset adjustment.)

5. With regard to this item, I would like to disclose their full device configuration. Therefore, please let me send that by e-mail.

6. No, they are making working design by only using DAC7554, not 4 single output DACs at this moment.

We are looking forward to hearing from you by e-mail for further discussion.

We thank you once again for your information.

Best regards,