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ADC78H90　conversion problem at 7.1M clock

toshi-e2e
Genius 4790 points
Other Parts Discussed in Thread: ADC78H90

Hi all,

My customer reported that ADC78H90 can not convert an input dc signal correctly when changing the input channel from AIN1 to AIN5. A5's voltage level is 0V. Moreover, an input stage has a voltage follower circuit. 
SCLK is 7.1MHz.

The test result are as follows;

AIN1 -> AIN2 OK
AIN1 -> AIN3 OK
AIN1 -> AIN4 OK
AIN1 -> AIN5 NG
AIN1 -> AIN6 NG
AIN1 -> AIN7 NG
AIN1 -> AIN8 OK
AIN2 -> AIN5 NG
AIN2 -> AIN6 NG
AIN2 -> AIN7 NG
AIN5 -> AIN5 OK
AIN6 -> AIN6 OK
AIN7 -> AIN7 OK

Before changing Ch, ADC can work correctly.
Below is the result of AIN5( 0V) after changing input channel from AIN1 to AIN5.
The conversion data was settled at around 0x05h when continuing to convert. 



AIN5 input cuicuit:

According to the datasheet, after changing an input channel, the converted data is outputted in the following cycle.
Moreover, the input stage can be considered to sufficient low impedance for an ADC input.

Why there is the difference result between channels?

Is there any solution for this? 

Regards,
Toshi

 

 

  • 0
    TI__Expert 3155 points

    Hi Toshi,

    0V output may be difficult to achieve for for the buffer in your schematic - even Rail to Rail amplifiers lose their gain within 10s of mV off either rail.

    2 quick things to try:

    • remove 100Ohm resitor, and change the 4700pF cap to a low value resistor of your choice (100Ohm is a good value). Now that you have applied 0V to the ADC input, try the conversion result.
    • or, apply some known potential to the input of the buffer, say 1V. Check the conversion result.  

     

    Sincerely,

    tom