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ADC3441 : Questions

alpha
Expert 2530 points
Other Parts Discussed in Thread: ADC3441

Our customer is considering ADC3441.
Could you tell us about their questions as below.

1. How range can VCOM voltage be applied ?
They are considering to set 1.175V.

2. Are there any limitations about the condition of input signal measurement?
Customer's condition is
- INAP is applied input signal
- Analog input is INAP=VCOM.

Their ideal is
- INAM = VCOM = 1.175V
- INAP = 0.75V ～ 1.6V (VCOM ± 0.425V)
- Measure full scale as 13bit

3. Do you have any devices that serial convert to parallel?
Or do you have sample of HDL for FPGA?

Best regards.

  • 0
    TI__Genius 12965 points

    Hi Alpha,

    1. Are you referring to Vcm or Vocm? 

    Vcm is generated by the ADC and is typically at 0.95.  This is the input common mode voltage of the analog inputs and the ADC drives this out as a reference for the input circuit/signal.

    Vocm is the ouput common mode for the ADC LVDS output signals.  Typically this is driven by the ADC LVDS outputs to be typically 1.05V with a 350mV differential swing (see section 8 of the data sheet).

    2. The input signal must meet the common mode voltage of the ADC which is typically 0.95V.  For passive interface you can use section 10.2 typical applications in the datasheet to get an idea of what the circuit should look like.

    The max swing on the input should be VCM (0.95V) with nominal 2Vpp swing for input frequencies less than 450MHz.  For signals less than 600M the nominal swing is 1Vpp.

    If the signal is within these limits it should be ok.

    3. We do not have any devices that convert serial to parallel.  We can help by providing the FPGA code for the TSW1400 capture card ADC3xxx LVDS interface.  However this code would be provided as is without any support.  This code is not optimized as it is part of our TSW1400 capture platform so you will need some experience to extract what you need.

    Ken