This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

Inquiry regarding I2C CLK period on ADS7828

Other Parts Discussed in Thread: ADS7828

Hello, all

Now we have one inquiry regarding I2C CLK period on ADS7828 from our customer.

Please refer to the item below, and feedback us with your comment.

On our trial board, we found that the I2C CLK period from this device was varied as described below;


However, this does not cause any communication error to the host.

Please let us clarify whether the phenomenon above would be accepted for this device or not.

We thank you in advance for your information.

Best regards, 

 

  • Hello Atsushi-san,

    The timing characteristics table on page 5 of the datasheet specify the min/max timing requirements for the device. In the I2C protocol, it is important to issue the appropriate Start, Stop/Repeated Start conditions. Also, the receiving device, when addressed, is obliged to generate an acknowledge after the reception of each byte. The I2C protocol is described on p. 9-10 and Figure 2 of the datasheet.   Provided that the appropriate protocol and the timing min/max specs are met; there should be no issues.

    Best Regards,

    Luis