• Locked Locked
  • Replies 1 reply
  • Subscribers 46 subscribers
  • Views 415 views
  • Users 0 members are here
Support feedback
Options
Options
Similar topics

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

Reg: ADS5232(10MSPS),data holing time

sridevi ch
Prodigy 10 points
Other Parts Discussed in Thread: ADS5232
I have selected ADS5232,buffer SN74AVC1624N,RAM modules CY62187EV30.
I want to store the data directly from ADC to SRAM thru buffer with (XC3S50AN) FPGA  control.
As per the ADS5232 data sheet,sampling rate ranges from 10MSPS to 65MSPS its typical data holding time is 8.5nseconds.
RAM module data access time is 55nseconds.

In this case,Please verify and confirm the compatibility of ADC and RAM for data storage.
Awaiting for your valuable response.
Regards
sridevi
  • TI__Genius 9695 points

    Hi Sridevi,

    The RAM may be used if the sampling clock provided to the ADC is less than 18 MHz. Beyond this, data on the digital output of the ADC will be changing faster than the data access time of the RAM. Consider switching to a faster RAM if you plan to use the ADC beyond 18MSPS.

    Thanks,

    Eben.