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ADS5500 & DAC5687 Grounding Question

Other Parts Discussed in Thread: DAC5687, ADS5500

I am using the ADS5500 and the DAC5687 in a digital radio design and I am looking for some guidance on how to connect the ground pins. Does TI recommend using a single ground plane for all the ground pins of these devices (analog gnd, digital gnd, clock gnd, etc.)? Or should they be split ground planes connected at just one point?

I cannot see any recommendations in the datasheets on this although it looks like the evaluation boards from TI use a single ground for everything. We have a development board from another company that uses these parts and it uses separate grounds. We used this board for our proof-of-concept testing as it mates with an FPGA board and now we are designing our own hardware. We started basing our design on this development board but I now see the discrepancy compared to the TI eval boards.

I also have seen application notes from another high speed data converter manufacturer that recommend a single ground plane for all ground pins on their converters.

Can someone from TI please tell me what they recommend?

Best regards,


  • Russ,

    in general on our high-speed ADC evms we always use solid ground planes rather than splitting it up. Having said that if the ground split is done right we probably wouldn't expect any performance degradation compared to a solid one because we'd expect the return currents to flow the same path.

    If the layout and routing is done so that the analog signals and return currents are on one side of the device and digital signals and return currents are on the other side, then there is no longer a need for a split anyways in my eyes.

    We'd be happy to look over your schematic and layout files once you are ready. You can email those in rather than post them on the forum for proprietary reasons.

    Best regards,

    Thomas Neu

  • Hi Thomas,

    Thank you. That makes sense. I looked at the DAC5687 EVM more carefully and found that it does use a split ground plane although the schematic uses the same ground symbol for the whole circuit. The ground plane is just has a manually added split under the IC and there is one small joining section off to the side of the pcb.

    I looked at the ADS5500 EVM schematic and pcb and see that it has two separate grounds but the digital ground is just for some other digital parts and the ADS5500 has all it's ground pins connected to the analog ground.

    We might want to get you to review our pcb layout. Can you provide me your email address to send it to? My email is on my profile page here.

    Best regards,



  • Russ,

    sure. It's



  • Hello Russ,

    For the DAC5687, there is no specific requirement of common ground or split ground. The only schematic and layout recommendation is regarding the pin 56 DVDD pin on page 65 of the datasheet. For the DAC EVMs, we have been leaning towards common ground method. From the DAC5687 EVM layout,  the EVM was designed to have the digital inputs on the left side and the analog outputs on the right side. The two sides have been isolated based on the placement, and adding the partial cut-out is to further minimize the possible stray currents.

    Here is a pretty good layout practice suggestion from our TI FAE, Mark Fortunato:

    Quoted text:

    I would add the following to the grounding issue.  I go through the following mental exercise when working on the layout of a high speed design like this (or, indeed, a high precision lower speed design).  Except at one point at the chip where the grounds are connected I “cut” the ground plane between analog and digital ground making sure all the analog pins are in the analog ground section and all the digital pins are in the digital ground section.  I then route all the traces without ever crossing the cut.  Sometimes this requires moving some other parts around.  Once this is done I remove the cuts.  The reason for the cuts is just to force the discipline of having all the analog traces stay on their side and all the digital traces stay on their side.  

     High speed ground currents will run on the ground plane under the traces that sourced the current (i.e. the path of least IMPEDANCE, not RESISTANCE).  This is due to the mutual inductances between the trace and ground.  Low speed signals will follow the straight line least- resistance path back.  At speeds in between the current will have a distribution of paths between the two.  What is “high speed” and “low speed” are determined by the geometry and dielectric constants of the materials being used and Maxwell’s equations.  

     If components are properly placed to make it easier to route al the digital traces away in one direction and all the analog traces in the other direction then the currents will never cross or share any common section of the ground plane.  You really do not need to know what is high speed and what is low speed to get this right.  Just keep in mind the generalities that the current will be distributed between the straight line path of least resistance and the under-the-trace path of least impedance and make sure these return paths for the analog signals run away form the chip in one direction (on one side of the cuts) and the return paths for the digital signals run away from the chip in the other direction (on the other side of the cuts).  If this is done right, no current will “want” to cross the cuts and, therefore, the cuts serve no purpose and can be removed, or rather filled in with metal for a solid ground plane.

     Once you get good at this thought process there is no need to lay in the temporary cuts.  You just place your components and run your traces thinking about what the round trip path is for the currents keeping digital away form analog and it all takes care of itself.

    Hope this helps.

    Kang Hsia