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AMC7891 Monitor and Control ADC Clock Source Fidelity

Other Parts Discussed in Thread: AMC7891

The AMC7891 MAC device contains an ADC which has an automatic 500 kHz clock mode.  The device has a signal to noise ratio of about 61 dBc at Fin = 1 kHz (I assume that is at 500 ksps), so the clock fidelity should be fairly good.  How is this clock derived and what is the tolerance on the sample clock? 

I would like to try and sample an audio waveform with this clock; would the sampled fidelity be better using this internal clock or should I sample using the manual trigger and external (clean, high stability) clock on the SPI bus?  I would prefer the latter because it is synchronous.