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ADS6129 design - serial configuration

Other Parts Discussed in Thread: ADS6129

Hello,

 We are working on ADS6129 design, for configuration of ADC both parallel and serial config modes have been used.

As per the description and timing diagram, serial configuration looks very similar to SPI interface.

SCLK: Serial Clock

SDATA: MOSI (Master Out Serial IN)

OVR_SDOUT: MISO (Master In Serial Out)

SEN: Chip Select

 Please confirm us that SPI protocol can be used for serial configuration purpose.

 Thanks,

Ashwini

  • Hi,

    If you follow the timing shown in Figures 6 and 7 of the datasheet, then yes the four SPI pins you list (SCLK, SEN, SDATA, SDOUT) are the SPI port for writing to and reading from the registers in the device.  Note please that the *falling* edge of the SPI CLK is centered in the middle of the SPI data bit as in Figure 6.  Not all our devices use the falling edge of SCLK, so watch for that.  And to do a SPI read, you first have to do a SPI write to enable the SPI read as shown in Figure 7.   Then before you could do any more SPI writes, you have to do one more SPI write to clear the bit that enables the SPI reads. 

    When using the serial programming in conjunction with the two other control pins Mode and DFS, note that Table 2 lists which takes priority in the event that the pin setting doesn't match the register programmed value for a particular feature.

    Regards,

    Richard P.

  • Thanks for you reply.

    How do i know default register values?Whether it is mentioned in any document?

    Regards,

    Ashwini

  • Hi,

    I've looked through the datasheet as well, and do not see a statement as to default values.  I have asked the design team about it and will let you know what I find out.  I know in some other datasheets we have put in a footnote that all registers default to zero after reset, but until I hear it from the design team for this device I would not count on it.

    Regards,

    Richard P.