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I have serious problems trying to configure a DAC3171 through SPI

Guillermo Jaquenod
Prodigy 140 points
Other Parts Discussed in Thread: DAC3171

Hi!

I`m again fighting against a DAC3171 to configure it

Signals come from a FPGA, who works as a multiplexer of the SPI signals generated by a K60 Kinetis Cortex CPU.

In a past post you suggest me to check first at all the SPI interface ... had you similar troubles with some DAC3171 devices?

I`m using a Tektronix 4 channel digital to capture CSn, SCK, SDIO, SDO and all signals seem to be OK. I also checked that RESETb is pulsed 1-0-1 before configuration. But when I read back the registers, SDO output remains grounded and the DAC3171 outputs are mute.

Voltages are also OK.

I changed the device and the new device behaves similar.

May you suggest me any other test to do?

Thanks

Guillermo

  • 0
    TI__Mastermind 29220 points

    Hi,

    I have not had any trouble to read back the SPI registers from the DAC3171 EVM and seeing the read back data on the SDO pin.   The SPI GUI that is on the TI web for the DAC3171 EVM was created at a time that we often did write-only and did not support read-back.  So when I needed to be able to read back from the device to demonstrate features such as the IO Pattern Test, I needed to be able to read Config4 from the device and I had to create a new SPI GUI to be able to do that.  I used 4-wire SPI mode for that, so I needed to be able to read the SDO pin and I have not seen a problem with that.  Be aware that you do have to *enable* 4wire SPI mode by setting bit9 of Config0 or else the SDO pin will be tri-stated and the internal pull down resistor holds the pin to a constant low.

    What are the register contents that you are trying to write to the config registers?  if your list of register writes already include having the SIF4_ena bit set, then I would want to see your scope shots of the SPI bits to make sure there wasn't a misunderstanding of things like msb-first or lsb-first - that kind of thing.

    as far as the DAC output being quiescent, depending on how you set up things like the FIFO and sync'ing the FIFO, you may need to enable the FIFO, enable sif_sync if not using the SYNC input pin, then low and then high on the sif_sync bit to get the FIFO pointers initialized, for example.  Or a number of SPI register bits could turn off DAC output, once the SPI read and write is figured out and working.

    Regards,

    Richard P.