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Hi all,

Recently have been trying to make a circuit that uses a ADS8885 SAR ADC to convert low frequency signals.

Here are the requirements of our design

Our frequency band of interest is between 0.1 to 200 Hz.

We want to achieve high SNR by sampling at 250 kSPS and digitally low-pass filtering data above 200 Hz.

We want to do this with as little power consumption as possible! (total should definitely be below 10 mW)

Our signals are fully differential

We use a 5 V reference.

As a starting block, we created a circuit based on the SLAU513B design by Vinay Agarwal, but we used the ADS8885 instead of ADS8881 and we use a 5 V reference instead of a 4.5 V reference.

We shorted our inputs and started sampling noise to see the noise performance of the design. If we plot the spectrum of the data we see the following:

At high frequencies the spectrum is nice and flat (as expected), but below 1 kHz, we see an increase in noise. This is very unfortunate because this increase in noise is in our band of interest. In datasheets noise plots are never plotted on a logarithmic scale, so it is impossible to verify with the datasheet if this behaviour is to be expected.

My first question is: Where does the increase in noise below 1 kHz originate from and how can I get rid of it?

Second, the total integrated noise is less than what the datasheet tells me it should be (103.8 dB measured vs 100 dB datasheet). Although this is a 'good' result, it makes me question my design or setup ;).

My second question is: Why is my measured integrated noise almost 4 dB lower than specified in the datasheet?

In summary, I seem to have "too little" noise at high frequencies and "too much" noise at low frequencies. I'm confused.

Looking forward to get some help and advise!

Nick Robertson,

Design engineer

• Hello Nick Robertson,

Attached is a file that Art Kay prepared explaining the aliasing of the OPA320 output noise when sampling at 250 kSPS.

Art_Kay_opa320_noise_alias.pptx

Nick Robertson
My first question is: Where does the increase in noise below 1 kHz originate from and how can I get rid of it?

The increased noise density observed below 1 kHz corresponds to the 1/f noise region.

You can find more information on the 1/f noise region and broadband region in the TI Precision Labs.

http://www.ti.com/lsds/ti/amplifiers-linear/precision-amplifier-precision-labs.page

https://training.ti.com/ti-precision-labs-op-amps-noise-1

https://training.ti.com/ti-precision-labs-op-amps-noise-2

The noise observed in your system comes from the OPA320 and to reduce the observed noise one needs to include a combination of anti-aliasing filter and an amplifier with lower 1/f noise.

As mentioned in the presentation, our first idea is to look into an amplifier design to drive the SAR ADC using the OPA188. I will update this post based on the results of our experiment.

Nick Robertson
Second, the total integrated noise is less than what the datasheet tells me it should be (103.8 dB measured vs 100 dB datasheet).
Although this is a 'good' result, it makes me question my design or setup ;).
My second question is: Why is my measured integrated noise almost 4 dB lower than specified in the datasheet?

Could you explain the process you used to calculate the 103.8 SNR figure quoted in your post?

The swing to the rail capabilities of the OPA188 are lower than those of the OPA320. What is the amplitude of your signals and what power supply levels do you have available in your system?

Best regards,

Jose

• Hi Jose,

Thanks for your reply, I have read it with a lot of interest. However, I did some experiments that still raise some new questions. Please have a look at the attached pdf and let me know what you think.

Best regards,

Nick

• Hi Nick,

You are very welcome.

Unfortunately Art and I failed to review one key aspect prior to our previous reply: we didn’t check the total integrated noise from your observed power spectral density plots.

Attached is a spreadsheet with the integration of the power spectral density you observed. The expected input-referred noise observed in your measurements is about 153 uVpp whereas the expected input-referred noise calculated from the ADS8881 datasheet is 152.6 uVpp; therefore you are measuring the expected noise density in the ADC.

Since you are planning to use a digital filter to post-process your acquired data, we included (in the excel sheet) the expected result for the case of only integrating up to 1 kHz. In the case of integrating up to 1 KHz one would expect a peak to peak noise lower than 22 uVpp. Since the LSB size for a 4.5 V reference is 34.3 uV, you can expect less than 1 LSB influence of ADC noise after post-processing your converter results.

Essentially, if your input signal of interest is larger than 1 LSB you should be able to see it after digitally processing your data.

I hope this clarifies the situation.

Best regards,

Jose

• Hi Jose,

Thanks again for the reply. Your reply indeed clarified some aspects, but I do remain with some questions. Your help would be greatly appreciated.

First let me explain that the final requirement for my setup: After processing my data, I need less than 1.25 uVrms noise in my band of interest (0 - 200 Hz). I am aware that this is much lower than 1 LSB but filtering the data allows me to increase the resolution of the data so this is not a problem (see for example this document: ).

To see if I can achieve this low noise, I looked up the transition noise figure in the datasheet of the ADS8881 which is 0.7 LSBrms with a 5 V ref (or 26.7 uVrms). Because this noise can be attributed (according to the same source as above) (mainly?) to Johnson–Nyquist noise, we can assume its spectrum to be white. The noise density of the sampled noise is therefore only dependent on the sampling rate of the ADC. If we assume an ADS8881 running at 400 kSPS we can calculate the noise density by Vn_dens = Vn_rms / sqrt(fnyquist) = 26.7e-6 / sqrt(200e3) = 60 nV/sqrt(Hz). This corresponds roughly to what I measure above a few kHz. If the spectrum of this noise is indeed entirely flat, my integrated noise in the DC-200 Hz band would be Vrms = 60e-9*sqrt(200) = 849 nVrms, which would be well below the required value of 1.25 uVrms. Unfortunately, in practice I fail to reach these numbers:

As showed before, when I measure with grounded inputs, above a few kHz the noise density is indeed as low as I calculated (60 nV/sqrt(Hz), or even a little lower). Below a few hundred Hz however, 1/f noise spoiles my measurement and after filtering, I fail to reach the 1.25 uVrms. My question therefore is:

Is the 1/f noise I measure with grounded inputs an intrinsic property of the ADC itself, or can I lower it by improving for example reference circuit, or PCB layout?

If it is indeed a property of the ADC itself, I will look further for a different solution. If this is not the case (and the noise dependency on the SCLK showed in my previous post, hints towards this) I can try to improve the circuit to remove the 1/f noise, but help from TI’s side when doing this would greatly be appreciated.

Best regards,

Nick

• Hi Nick,

I will double check with the design team to see if they have any further insights. In my opinion, the 1/f noise region observed in your measurements is intrinsic to the ADC and cannot be lowered.

One potential option you have is to mix your input signal in the analog to domain to move it up to a frequency range where the broadband ADC noise is dominant; then you can apply a bandpass filter in your digital processing and demodulate back to baseband.

I will update this post if the design team has further comments.

Best regards,

Jose

• Hi Jose,

Any news from the design team? I'm still very curious where the 1/f noise originates.

BR,

Jules