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Other Parts Discussed in Thread: DDC112

We have given power supply +5v and CLK(10MHZ) and CONV(500HZ) from AFG3102 function generator to the DDC112 chip.The DVALID signal is coming properly but it is inverted.oscilloscope snapshot is attached herewith.The yellow trace is DVALID and pink trace is for CONV signal.Please help us to resolve it. Please help us to resolve it.

  • Hi Subhabrata,

    We have received your query about the DDC112 device and have notified the device applications expert.
    He will get back to you with a response as soon as he can.
  • Subhabrata,

    The behavior you are seeing is normal if DXMIT and DCLK are not being used to read out the data. DVALID is low when the data is ready to be read out. If the data does not get read out, DVALID needs to go high again briefly before dropping low to show that data is once again ready. The figures in the datasheet assume that data is getting read out soon after DVALID goes low which causes DVALID to go high again when DXMIT is pulled low and DCLK is toggled to read out data.