hi
I am using afe5807, there are four adcs on my pcb board, when i set the TEST_PATTERN_MODES (ramp de-skew .....) , FPGA(XILINX V6) can aquire the correct data , but when TEST_PATTERN_MODES is Normal operation, one chip can not acquire data correctly , the other three chip can acquire data correctly, why? same one can help me ? or there are FPGA CODE about afe5807?
