Interfacing DAC3151 to IQ modulator

Hi,

We do not have a ready-made interface circuit that fits your exact specifications.  I would suggest you take a look at the TI Design at:

http://www.ti.com/lit/ug/slua647a/slua647a.pdf

 which has a comprehensive discussion of an interface between the DAC3484 and an IQ modulator.  The DAC3484 is of a similar architecture as the DAC3151 in that both are current sourcing DACs and your specifications for VCM falls within range of either DAC.  The example circuit in the document in figure 5 and following figures result in a VCM of 0.25V, but I believe if you change the 50 ohm pulldown to 100 ohm, then you would get your VCM of 0.5V.     The nominal full scale voltage under such condition would be much larger than your 0.8V p-p differential, but the DAC3151 has the external BIASJ (pin 57) resistor that can be used the adjust the full scale output from 20mA down to 2mA, so this would be an easy way to adjust for your desired full scale once you adjusted for 0.5V VCM. 

After that there remains your filter specification.  The filter used in the TI design would have a different cutoff frequency, but TI TINA or a filter design tool such as Elsie (  tonnesoftware.com/elsie.html ) could be used to design the filter to your own specifications.

Also, the DAC3151 is a single channel DAC - would you not require the two channel DAC3154 fir your IQ application?

Regards,

Richard P

Thanks. I will check on filter design.

We have separate data pins for I & Q coming out of FPGA for DAC interface. So we have chosen single channel DAC.

Hi Richard,

If I set full scale current to 18mA and pull down of 100ohm, I can achieve Vcm=0.5V and Vp-p=0.8V as per my requirement. Can you please let me know the equation for calculating the Rbias resistor for 18mA operation. Reference operation section in DAC3484 datasheet doesn't map to DAC3151. DAC3151 datasheet doesn't has this info mentioning full scale current and bias current relation (back calculation shows, IFS=32*(1.2/960)/2). Please let me know about it.

Thanks,
Anirudha

Hi,

yes, I believe your equation for the full scale current in relation to the EXTIO voltage and RBIASJ is correct.  I see in the internal design document that the full scale current is 16 * (VEXTIO / RBASJ) which for 20mA full scale would be 16 * (1.2V /960ohm) = 20mA. 

So 1067 ohm BIASJ would give 16 * (1.2/1067) = 18mA. 

Note also that there is the option to provide an external reference voltage for EXTIO that is less than 1.2V, or use register Config10 to set a 4 bit field to scale down the full scale output, in steps of 1/16 which may not provide the kind of granularity that you may be looking for.   Changing the resistor on BIASJ seems to be the easiest.

Regards,

Richard P.

Hi Richard,

I want to set DAC3151 in FIFO bypass mode.

Can we by-pass FIFO in DAC3151 for normal operation (Data and DAC clk matching will be taken care)? If we disable the FIFO then do we need to provide sync signal to DAC ?

We are using below settings:
x0 x2004 (with sync and FIFO disable)
x1 x6C00
x2 x3FF0
xA xF0A0

Rest written to 0.

Can you please verify and let us know.

Regards,
Anirudha

Hi,

yes, you can disable the FIFO and then use DATACLK to latch the sample data into the device and by having the proper phase relationship between DATACLK and DACCLK you could have the data handed off inside the device from the DATACLK domain to the DACCLK domain.    And by doing this there would no longer be any need for the SYNC signal nor the ALIGN signal since these signals are just used by the FIFO.    But I can't tell you what that phase relationship would have to be for DATACLK to DACCLK, as I am told that that mode of operation was not characterized.    Probably having the DATACLK and DACCLK clock edges aligned at the DAC would be the best starting point, but if there are clock skews inside the device than the proper phase relationship of the two clocks going into the device might not be aligned.  There might need to be some external clock skew between one clock edge to the other.  You would be on your own getting that phase relationship dialed in for proper operation. 

Regards,

Richard P.