I'm in the process of evaluating the ADC12J4000 on the VC707 evaluation board and have decided to use the TSW14J10 to help verify a few operational modes on the ADC. I have followed the setup guide in the TSW12J54EVM product guide, which says to use the ADC12J4000EVM GUI to program the device and HSDC Pro to view the captured data.
After programming the ADC EVM and configuring the HSDC Pro software to match, pressing capture causes the HSDC Pro software to throw an error that states "Start ADC to DDR, TIMED_OUT_ERROR." This only occurs after programming the EVM. Connecting and programming the VC707 without attempting to configure the ADC12J4000 yields no such error, but this doesn't allow me to test any ADC operation.
Reading some other posts has lead me to believe that it could be an issue with one of the clocks being used, but I have been unable to find out what could be wrong with the clock configuration. Another issue seems to be from a programming error when the GUI writes to the ADC, but I haven't been able to find a register that is incorrectly configured yet. It appears that the GUI is indeed setting registers correctly, and I can individually set and read control registers with no issues.
My intended operating specs for the ADC12J4000EVM GUI are:
On board Fs = 4000 MSPS
Bypass mode, DDR
ADC Output Data Rate = 4G
I currently have no analog source connected, as I would like to use a test pattern to verify my own drivers once I can be sure the modules are communicating correctly.