DAC5574 I2C Bus

Hello,

Sadanori Kato said:

Q1. I2C Bus Connection
Is it possible to connect I2C bus as below ?

Yes - those are the intended connections. You will find the same scheme on page 25 of the datasheet. The pull-ups are suggested between 1kΩ to 10kΩ, which may vary depending on the speed of the I2C bus.

Sadanori Kato said:

Q2. Threshold for Input Low/High Voltage for SCL SDA
Could you please tell us the threshold of the input low / high voltage for SCL and SDA if possible ?

Page 3 of the datasheet specifies details about the logic inputs. Input low voltage is specified as 0.3xVDD and input high voltage is specified as 0.7xVDD.

Sadanori Kato said:

Q3. Power-on Sequence
The 3.3V is supplied to the SCL and SDA pins for DAC5574 if the power supply(5V) for DAC5574 is turned off before the power supply(3.3) for uC is turned off.
Is it possible to apply the above power-on sequence ?

Page 2 of the datasheet specifies the absolute maximum ratings for the device. The digital input puns SCL and SDA specifies the range of acceptable voltages with respect to GND as -0.3V to VDD + 0.3V. If VDD is not applied (0V) and 3.3V inputs are applied to the device the absolute maximum ratings table is violated - which means the device is at risk of being damaged, suffering from parametric degradation, or other deviations from the behavior which is described by the datasheet. Officially this is all that TI can commit to.

I will say, though, since there is 1kΩ to 10kΩ in between the 3.3V supply and the SCL and SDA pins I would find it unlikely that the internal structures of the digital pins would be damaged. Since this is a power-off sequence I do not believe the OTP read process would be corrupted leading to any unexpected behavior of the device. Again, the only "official" comments are that this violates the absolute maximum ratings table and therefore puts the device at risk.

Sadanori Kato said:

Q2. Threshold for Input Low/High Voltage for SCL SDA

---> Could you please tell me the input threshold voltage for "the low level and the high level" just in case if the above connection method is applied for the I2C bus ?
     For instance, if the 5V which is supplied to DAC5574 is applied for the following "VDD", VIN_L is 1.5V and VIN_H is 3.5V.
     On the other hand, if 3.3V which is supplied to uC is applied, VIN_L is 0.99V and VIN_H is 2.31V.
     Could you please tell me which is correct ?

     

The device logic thresholds will still be defined by the VDD supply. So your calculations for 5V VDD are the correct logic thresholds for the device at 1.5V logic low and 3.5V logic high.

For the two devices to communicate either the supply voltages must change to accommodate compatible thresholds or a level translator device must also be included.