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Programming the ADC32J45 reset, sclk, sdata, and sen pins using the EVM

Henry Moy
Prodigy 30 points
Other Parts Discussed in Thread: ADC32J45, ADC32J45EVM

I want to access the ADC32J45 part's sclk, sdata, sen, and reset pins to program the internal registers.  I want to do this through the Evaluation Module board's FMC connector. 

On page 12 of the schematic ADC32JXXEVM-SCH_C.pdf, I see the part 5M80ZT100 shown.  Is this the FMC connector on the EVM?

  • 0
    TI__Mastermind 43870 points

    Hi Henry

    The 5M80ZT100 is a programmable logic device. The FMC connector is shown on Sheet 9 of the schematics, labeled J17A through J17C.

    Table 4 of the ADC32J45EVM User Guide (slau579) explains the jumper settings required to enable SPI via the FMC connector.

    Best regards,

    Jim B

  • 0 in reply to Jim Brinkhurst1
    Prodigy 30 points

    Hi Jim,

    Do the FMC_SCLK, FMC_SDIO, FMC_SDO, and FMC_SEN_ADC pins in the FMC on SHEET 9 of the ADC32JXXEVM-SCH_C.pdf schematic connect directly into the ADC32J45 itself?

    Maybe that is where I am getting confused.

    On SHEET 4 of the schematic, I only see the nets ADC_SDENB, ADC_SCLK, ADC_SDIO, and ADC_SDO connecting directly into the ADC (U1) itself.  So, I'm only seeing a connection from the ADC32J45 to the CPLD.  I don't see any connection between the ADC32J45 SPI interface and the FMC connector pins.

    Are you saying by setting Jumper JP8 to FMC, the nets FMC_SCLK, FMC_SDIO, FMC_SDO, and FMC_SEN_ADC will connect directly into the ADC32J45 instead?

  • 0 in reply to Henry Moy
    TI__Mastermind 43870 points

    Hi Henry

    The programmable logic device (CPLD) enables either the USB interface (U5 - FT245RL) or the FMC connector (J17) to provide the SPI for the ADC and LMK devices on the EVM. The setting of JP8 (per Table 4) selects which of these two sources is used. The USB interface is used by default.

    The signals are not 'directly connected' between the FMC connector and the ADC or LMK, but are routed through some fairly simple digital circuitry inside the CPLD.

    Best regards,

    Jim B

  • 0 in reply to Jim Brinkhurst1
    Prodigy 30 points
    Hi Jim,

    I see. So, if I set JP8 to FMC, the FMC SPI signals (FMC_SCLK, FMC_SDIO, FMC_SDO, FMC_SEN_ADC) will get routed to the ADC SPI interface itself.
  • 0 in reply to Henry Moy
    TI__Mastermind 43870 points

    Hi Henry

    Yes, that is correct.

    Regards,

    Jim B