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ADC3244 Register Interface Problem

Other Parts Discussed in Thread: ADC3244EVM, ADC3244

I have connected an ADC3244EVM board via mini USB to a PC running the ADC3000 GUI. On start up, the GUI correctly reports 0x00 for all registers. Any subsequent reads, however, report 0xFF. I have seen this problem before but, when left alone over the weekend, it resolved itself. Short of trying a second board, is there anything I can do to ascertain whether this is a hardware problem? If it is a hardware problem, is it one that could have been caused by me or is a manufacturing fault?

Thanks,

Steven

  • Steven,

    Please ensure that the ADC3k GUI shows the appropriate EVM has been detected (ADC32xx) and the USB status indicator just below lights up green.

    Also, it is recommended that you push SW1 - ADC RESET to perform a hardware reset to ensure that the device is in a known state.

    Let me know if this helps.

    Ken.

  • Hi Ken, thanks for your reply. I can confirm that the device is recognised as an ADC32xx, the USB status light is green, and that I have pressed SW1 - ADC RESET on numerous occasions.
  • Steven

    There are possibly 2 issues. I was hoping to see if I could figure out if the issue was with the USB chip or the ADC itself. The FTDI USB chip is enumerated with the ADC32xx ID so this is what the GUI looks for when connecting to the EVM. It seems like that part of it is ok. If you are getting all ones as a read back, then there may be something wrong with the ADC/SPI portion of the circuit.

    Can you also confirm if the power planes AVDD1.8 and DVDD1.8 are ok? These are located at FB4 and FB5 (ferrite beads).

    Also please ensure that the jumpers JP1 (PDN 2-3) and JP2, JP3, JP4, JP5 are ok (remove and plug back in just to make sure there are no opens caused oxidation).

    After you press ADC RESET are you able to get a capture of the ADC output data? The ADC will operate correctly with the default reset values if CLK is provided.

    If this all fails then there may be an issue with the ADC hardware itself and it may require an exchange of the EVM.

    Ken.
  • The power planes were both reading roughly 1.9V. I have tried removing and replacing the jumpers. I am able to capture ADC data. I am interfacing to an FPGA via the FMC and my firmware was unable to achieve frame alignment (this might be a problem with my design). That's primarily why I wanted access to the registers, so that I could configure and use the test patterns. Any further thoughts?

    Thanks,

    Steven

  • Are you using an adapter to go from HSMC connector to the FMC on the FPGA platform?  The ADC3244 EVM is equipped with an HSMC connector for the LVDS signals.

    For the LVDS interface I'm not sure I understand how you are not achieving frame alignment.  The FCLK output should provide the sample framing reference on the LVDS bits.  You should be able to align the samples to the FCLK and DCLK as per figure 133.

    If you are still having SPI issues, please work with your distributor for an exchange.

    Ken

  • Yes, I am using the HSMC with TI's FMC adaptor (www.ti.com/.../FMC-ADC-Adapter). My FPGA design is based on the Xilinx Application Note 524 (www.xilinx.com/.../xapp524-serial-lvds-adc-interface.pdf), heavily modified for use with the 14-bit ADC3244. FCLK is sampled by a version of DCLK and deserialised, allowing it to be used as a training pattern for the alignment of the data bits. My design looked like it was working before the register problem appeared. Now the deserialised FCLK is not constant; it changes almost every DCLK edge.

    Please let me know if that sounds wrong. I will try to get a replacement board.

    Thanks,

    Steven
  • DCLK, FCLK, should all be synchronous to CLKin. If not then either the CLKin is not stable causing DCLK and FCLK to be not stable or there is a problem with the device/EVM.

    I would request a replacement from your distributor as that may be the easiest and quickest route. We have not seen anything like you describe with the CLKs along with the SPI issues.

    Ken.