in TIDU012B, OPA333 and THS4281 are used in reference circuit, it is detailed to be discussed in TIDU012B, in section 3.2.2.
i want to know if it is stable, so i simulate this circuit in TINA, the bode figure shows that crossover frequency is 561Hz, but phase margin is only 2.67 degree.
it is unstable.
could you help to explain this? thanks.
I got the cause, the non-inverting pin should be connected to Vcom, half of Vdd.
Hi Max
Good to see that you found the solution.
To meet SAR ADC reference pin peak current requirement we need high bandwidth/high drive buffer after voltage reference. Generally such high bandwidth/high current drive op amps consumes few mA of quiescent current. Composite reference buffer meets ADC reference pin current requirement while still maintening power consumption within certain limit.
To address this we have recently launched new reference device REF60xx. This is a high precision voltage reference with ADC drive buffer integrated in to one package. It is designed to meet ADC reffence pin peak current requirement and droop performance. So it is a single chip solution compared to traditional voltage reference +composite buffer (3 chip solution).
We have released ADS8881+REF6025 evalation board where you can find more information about REF60xx droop performance and overall system performance.
Alternately you can refer to section 9.3 of REF60xx datasheet
Thanks & Regards
Abhijeet Godbole
