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ADC10321 analog input Sample and hold switching noise upset the amplifier

Lizhi Jing
Prodigy 40 points
Other Parts Discussed in Thread: ADC10321, OPA698, LMH6702, OPA695

I'm using ADC10321 in my design. The sample frequency is 20MHz. The bandwidth of input analog signal is more than 100MHz. There's 20MHz noise in the capture data when input signal Vpp is 700mV. When input signal Vpp is less than 200mV, the 20MHz noise is not significant.

facts of circuits:

1. the serials resistors between the ADC digital data bus and FPGA are 110 ohms, which are put close to ADC10321.

2. the amplifier before ADC10321 is OPA698. Analog input signal is DC-coupled to ADC.

3. 6-layers PCB layout, one-point joint connection between digital and analog ground underneath the ADC device, following the layout recommendation in ADC10321 datasheet.

Is there secret of the sample and hold circuit inside ADC10321? Is there any demo board of ADC10321? Nicholas Gray's article "maintaining signal integrity enhances ADC circuit performance" (see the following web link), discussed about this issue. According to the article, it needs 100ohms and 80pf low pass filter between the amplifier and ADC input. But this kind of low pass filter can't apply to my design, because the interested signal is more than 100MHz.

  • 0
    TI__Mastermind 44550 points

    Hi Lizhi

    Do you have any series resistance in between the OPA698 output and the ADC10321 VIN?

    Even if you don't have an RC filter there you should have some series resistance, as noted on page 22 of the OPA698 datasheet. Having some series resistance, and making the gain +2 or higher will help make the amplifier more stable with the capacitive loading of the ADC input.

    Best regards,

    Jim B

  • 0 in reply to Jim Brinkhurst1
    Prodigy 40 points

    Hi Jim,

    I do have serial resistor between OPA698 and ADC10321. There's little information of analog input in ADC10321 datasheet, no demo board. I can't find the analog input impedance. Which OPAM do you recommend for ADC10321?

    Best Regards,

    Lizhi

  • 0 in reply to Lizhi Jing
    TI__Mastermind 44550 points
    Hi Lizhi

    The ADC10321 datasheet recommends the LMH6702 op-amp (see The Analog Input section on page 15). It has approximately 3x the bandwidth of the OPA698 that you are currently using which should give better performance with your 100 MHz signal. However with the LMH6702 you will need to take care to not over-drive the ADC analog input. Another one to consider would be the OPA695, this can be operated from a single +5V supply which will prevent over-driving the ADC.

    Best regards,
    Jim B
  • 0 in reply to Jim Brinkhurst1
    Prodigy 40 points

    Hi Jim,

    After replaced OPA698 with LMH6702, there's no improvement. in ADS10321 datasheet page 14, "The
    use of an internal sample-and-hold amplifier (SHA) enables sustained dynamic performance for signals of input
    frequency beyond the clock rate, lowers the converter's input capacitance and reduces the number of external
    components required." In my circuits, there's only one resistor (33 ohms) between op-amp and ADC10321 for the DC-coupled application. there's no capacitor at all.

    "Care should be taken to avoid driving the input beyond the supply rails, even momentarily, as during power-up." on datasheet page 15. If the input is beyond the supply rails during the power-up, what will happen? Will it damage the analog input circuits inside ADC10321 permanently?

    Is there any demo circuits? How did TI get the performance plot (for example figure 16 on page11)? Would you be able to show your test circuits of ADC10321? I'd like to see TI's recommended analog input circuits. For example, there's more detail information in ADS823 datasheet.

    Best Regards,

    Lizhi

  • 0 in reply to Lizhi Jing
    TI__Mastermind 44550 points

    Hi Lizhi

    Figure 16 was gathered with the ADC running at 20 MSPS and a 4.43 MHz input signal. This is much lower frequency than your >100 MHz input signal. This lower input signal will allow an RC input network to absorb the clock frequency related energy at the input associated with the un-buffered SHA.

    I managed to locate a user manual for the obsolete EVM. The input signal path in that design looks like this, with a 47 ohm resistor and 68pF capacitor.

    The entire document is available here:

    10321MA2.pdf

    I hope this is helpful.

    Best regards,

    Jim B

  • 0 in reply to Jim Brinkhurst1
    Prodigy 40 points

    Hi Jim,

    I appreciate you share the document of evaluation board. It's very helpful.

    Best Regards,

    Lizhi