FPGA driving DAC5672 to accomplish 1MHz sinusoidal signal output

Hi:

         I have some questions in the application of the DAC5672 EVM,I'd like to use FPGA driving it to  accomplish 1MHz sinusoidal signal output,I configure the  DAC5672 EVM according to the following method just as the picture shows.Here, DAC5672 work on  dual bus mode,that is to say，just channel A works.I use 100MHz,3.3Vpp output clock of the FPGA as the input clock and WR signal of DAC5672,and the input clock is provided to DAC5672 EVM through WRT_1(J3) port. The DAC5672 EVM are powering from one supply(W9 applied)  which means the analog and digital supply are both 3.3V.However,i cannot  observe any output signal from IOUTA1(J1) port,Is there something wrong in my configuration since I can  observe the Sinusoidal output in signalTap II logic Analyzer?

       Look forward to your reply!Thank you!

       Look forward to your reply！Thank you!