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Could serial interface pins of ADC12J1600 be connected to FPGA 1.8V bank without any issues instead of 1.9V FPGA bank?

Kamrunnasim Mostafa
Prodigy 20 points
Other Parts Discussed in Thread: ADC12J1600

Hi all,

We currently have SPI pins and SYNC~ of ADC12J1600 connected to an FPGA 1.9V bank. There is nothing else in our design that uses 1.9V bank so currently having to dedicate a full bank of FPGA only for this interface which has become a bit of a problem at the moment as we need to use that bank for additional features! We were recently talking to TI regarding another topic and one of the recommendations were to ensure that SPI interface is connected to a 1.8V bank which was slightly puzzling because 1.9V is the typical recommended in the ADC datasheet and 1.8V is minimum! Now, the current situation is that if we could use 1.8V bank instead of 1.9V then it'd be very helpful for us as it frees up a whole FPGA bank for other applications! Could anyone please confirm that it'd be an acceptable solution from a design point of view if we used 1.8V (mind you, this is minimum stated in the datasheet) bank for the SPI and SYNC~ pins instead of 1.9V FPGA bank? Thanks in advance.

Kam     

  • 0
    TI__Mastermind 43930 points

    Hi Kam

    Yes, it is OK to interface the ADC 1.9V LVCMOS I/O with a 1.8V FPGA bank.

    The 1.8V FPGA outputs will have the needed logic low and high levels for the ADC inputs.

    All FPGAs that I'm aware of can handle the small amount of overdrive that the ADC outputs will have. I would recommend a small series termination resistance (33 ohms) near each ADC LVCMOS output to reduce edge rates and minimize any ringing on the signals input to the FPGA.

    Best regards,

    Jim B

  • 0 in reply to Jim Brinkhurst1
    Prodigy 20 points
    Hi Jim,

    Thanks for the quick response. I was wondering if using this 1.8V would have any ADC performance related implications as we don't want to compromise on performance. Your views are welcome.

    Kind regards,

    Kam
  • 0 in reply to Kamrunnasim Mostafa
    TI__Mastermind 43930 points

    Hi Kam

    The ADC power supply voltages must stay at the datasheet recommended operating conditions. VA19 should be set to 1.9V nominal, and VA12, VD12 should be set to 1.2V nominal. The Min/Max values are listed in the datasheet. With these voltages the ADC can be interfaced to an FPGA bank powered from 1.8V supply.

    As long as the recommended ADC power supply voltages are maintained, the ADC performance will be as expected.

    Best regards,

    Jim B