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DAC8760: Is there Current limiting in reference design TIDA-00170

Part Number: DAC8760
Other Parts Discussed in Thread: DAC7760

The DAC8760 data sheet describes recommended current limiting when the Vout and Iout pins are tied together.

Does the "16-Bit Analog Mixed Input and Output Module for Programmable Logic Controller (PLC) Reference Design" meet this requirement?

It shows a 1Kohm in series with the Vout and 10ohm in series with Iout and those signals are tied together after the resistors.

Thanks for any help

  • Dave,

    I'm a little confused. Where did you see a requirement for a current limiter when VOUT and IOUT are tied together in the datasheet? This should not be the case and if it is in the datasheet it should be corrected.

    The only concern when VOUT and IOUT are tied together is to ensure that IOUT is not exposed to the feedback network of the voltage output stage because it would create a leakage path with respect to the output load. This can be rectified either by digital calibration or by inserting a buffer amplifier between the shared VOUT/IOUT connection and the VFB pin.

    The 1kOhm resistor in series with the VOUT pin in the reference design you pointed out is actually a ferrite bead and it is there for the EMC/EMI protection circuit component of that design. The intent is for this to provide a high impedance node in between the diode stages in order to reduce current flow into the second diode stage, reducing it's forward voltage and making for a better clamp to rail. Similar is accomplished on the IOUT path with a simple resistor. The authors likely chose this structure because a static impedance would not be such a problem on IOUT while it would cause for a voltage drop on the voltage output path.
  • Kevin,

    The data sheet states a current limiter is required in the VOUT path, not in the +VSENSE input path.

    I realize now that the example circuit does not have +VSENSE tied to VOUT and IOUT.

    The section I misinterpretted was:

    The DAC7760 DAC8760 datasheet SBAS528A June 2013 - Revised December 2013 Page 46.


    "...if the VOUT, IOUT and +VSENSE pins are tied together, this circuit must be placed in the VOUT path before it is tied together to the other pins at the common terminal."

  • Dave,

    Ah...yes, I understand now. The comments on page 46 are meant to be contextualized to the placement of the VOUT current limiter (if desired) when designing with both VOUT and IOUT on a shared connector. A current limiter is not required when VOUT and IOUT are shared. Sorry for the confusion.

    Let me know if there is anything else we can help with.
  • Kevin,

    Now I'm confused about your shared connector comment.
    I do want to use a single shared I/O pin that the end user can softawre select between Vout +/-10V and Iout 0-20mA.
    Vout and Iout will not be simultaneously enabled.

    What does an external he current limiter protect against?

    Does the ALARM pin go low when Vout is enabled and shorted to ground, or only when Iout is enabled and current is too high?
    Or will shorting Vout result in overheating the die, causing an alarm condition?

    I appreciate your clarifications.
  • Dave,

    The comments on page 45 are for both if you want a current limited VOUT and a shared VOUT and IOUT connection. If you don't want VOUT current limited, the limiter is not needed.

    The limiter is for protecting VOUT loads. It's not always required, but some applications desire this feature.

    The alarm is only for IOUT enabled and current / load is too high.