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ADC12J2700: Should the ADC12J2700 have spurs at 1/2 and 1/4 of the sampling frequency?

Part Number: ADC12J2700

Hello

We are using the ADC12J2700 in our prototype.  Anyhow we took a long capture from the ADC and we noticed that we can see Spurious products of the ADC sampling frequency in the data.  Is this normal???

We are seeing 1/2 and 1/4 of the sampling frequency and they are -66dBm and -62dBm, respectively.  Please assist.  Thank you.

  • Hi Layne

    The ADC12J2700 ADC uses a 4-way interleaved architecture. A built-in calibration process is used to minimize the offset mismatch between interleaved cores, but there will be some residual mismatch after the calibration process completes. That is what causes the spurs at Fs/2 and Fs/4. The expected spur levels are listed in Table 6.5 of the ADC12J2700 datasheet.

    If these spurs are above the expected level you should initiate a calibration cycle by setting the CAL_SFT bit. (Register 0x050, Bit 3).

    Best regards,

    Jim B

  • Hi Jim

    Thanks for the quick response.