ADS6445: ADC EVM with DC coupled high impedance analog inputs

Hi,

There is a reason most of the EVMs are transformer coupled.  The purpose of the EVM is to facilitate evaluation of the data converter, and the transformer coupling is the lowest noise signal conditioning input.  Signal generators suitable for the analog input are single ended, while the ADC requires differential and that the signal be biased to the desired VCM.  Transformer coupling is the cleanest way of achieving both of those things.   But of course that precludes an input bandwidth down to DC. 

When the input bandwidth is to go down to DC, then an amplifier for the signal conditioning is generally used.  The amp can do the single ended to differential conversion as well as having a CM input that can connect to the VCM output of the ADC for the biasing.  Many of our EVMs will have an optional amplifier path on the EVM for one of the channels of the ADC.  The ADS6445 that you mention in the subject heading has a THS4509 amplifier on channel C of the EVM, for evaluation purposes.

Many of our EVMs will have a second SMA connector (usually not installed) for the other side of a differential input, so that a fully differential input can be brought into the EVM.  In this case we may also remove the transformer and solder a pair of zero ohm resistors across the pads from primary to secondary to provide a DC path through the EVM.    If you already have an input signal that is differential and biased to the proper level, then you could do this to one of our EVMs and bring that signal right up to the ADC.    Our higher channel count EVMs will often not have the second SMA per channel due to space limitations though.   But two and four channel EVMs often do.  So you may have to pick an ADC that meets your specs, and then check that the EVM can be easily modified for the differential DC coupled application.  The ADS6445 that you mentioned in the subject heading has single SMA inputs per channel.   There is a newer family of devices similar to the ADS6445 that *do* have the two SMA inputs per channel and could have the transformer coupling removed in favor of DC coupling.  See the ADC3244 family.  But with a single ended signal, you would need a separate amplifier EVM to do the signal conditioning to present a differential signal to the ADC EVM. 

Regards,

Richard P.

Hi Richard,

Thanks for the detailed reply. I understand the EVMs are designed for the most common AC coupled applications your customers use these high speed ADCs for. Our application is for acquiring near DC signals from a sensor array. We are switching through a large DNA sensor array which is very similar to an image sensor and acquiring signals from each pixel.

Also I see common mode restrictions on the ADS6445 of 1.5V. I do not quite understand the reason for a fixed common mode requirement. And I guess this makes a buffer necessary to drive the ADC in order to translate the common mode.

We could add a single ended to differential converter made using a THS buffer. But we would like to avoid this if we can. How about we bias the Ain- pin at 0.9V which is midrange for us and allow the Ain+ signal to swing from 0.2V to 1.6V in order to use the full dynamic range of the ADC. I know there are implications to driving the ADC in this manner. But I would like to see what kind of performance is achievable with this kind of a setup before adding a THS buffer. Do you see this as a possibility on the ADC3244 EVM? In the case of ADC3244 I am thinking I could just tie the VOCM of 0.95V to the AIN- terminal and just drive the AIN+ terminal.

I do not want to terminate the analog inputs with 50ohms since this means more power dissipation. I would like to drive the 6.4Kohm input impedance of the ADC3244 directly. I hope this is achieveable by de-populating any shunt resistors in the input path of the ADC3244EVM.

Thanks,
Nagaraj.

Hi,

All of our modern high speed ADCs require a fully balanced differential signal around a fairly tight common mode voltage, and by fully balanced I mean that the IN+ and IN- must always be symmetrical around that VCM at all times.   It is not acceptable to tie one analog input off to VCM and let the other input swing about VCM.  That would not be fully balanced and symmetrical, and at any instant in time the instantaneous common mode voltage would not be VCM, but rather halfway between the VCM and the analog signal.  You would need some kind of conditioning circuit to turn your single ended signal into a differential signal centered around VCM. 

I have seen people violate this differential requirement with a willingness to give up some performance, but there is no guarantee that a loss of performance would be all that happens.  The devices are not tested or characterized for single ended input, and I have seen on some of our other devices very poor performance when the erroneous common mode causes something to happen like cause the first stage of the ADC pipeline to over-range and clip, which throws off the whole rest of the sample.   There would be no damage to the device, but proper ADC functionality would not be guaranteed with a single ended input.  You might see diminished AC performance, or you might just see junk data.

Regards,

Richard P.

Hi Richard,

I found a two channel EVM board for the ADC3244 which also provides DC coupled paths using the THS4541. I will try this EVM.

I am planning on using it with an alterra Stratix IV based FPGA base board. I was wondering if I could use the TSW1400 firmware as a starting point. Could you point me to this firmware?

Regards,

Nagaraj.

Hi,

The Quartus projects for the TSW1400 may be downloaded at the TSW1400 web page:  http://www.ti.com/tool/TSW1400EVM 

Regards,

Richard P.