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ADS1120: Keep DOUT low after CS toggles

Guru 16770 points

Part Number: ADS1120

Hi

According to the datasheet, DOUT/DRDY is uncertain value after /CS is low.

However, DOUT keeps high after /CS is low in actual like following.

Is it possible to keep it low?  We want to make DOUT low until the valid data read.

BestRegards

  • Hi na na 78,

    This is not an advantage. When new data are available the DOUT/DRDY transitions from high to low if enabled to follow DRDY. If it is already low, when the conversion is finished there is a short pulse. It is very difficult to capture this pulse.

    It is much easier to follow the condition of if it is high the conversion is not finished. If it is low then new conversion results are available.

    Is there a specific reason why you need the DOUT/DRDY to be low?

    Best regards,

    Bob B

  • Hi Bob

    Thank you for your reply.

    It would be advantage for our customer to keep the DOUT / DRDY low before data reading.

    If DOUT is high, undesired current consumption would be expected by MSP430.  We want to avoid it possibly.

    That’s why we want to make DOUT of ADS1120  to be low while the system powered up.

    Are there any case the DOUT would be high after /CS is low?

    And Is it impossible to realize this requirement?

    BestRegards

    BestRegards

  • Hi na na 78,

    There are many possible combinations as far as mode of operation.  Please send me all device configuration settings being used.

    As far as device power up is concerned, there can be no changes to the operation.  On power up the ADS1120 will take one conversion and power down as the default mode is single-shot operation.  The DOUT/DRDY behavior will always be the same until the device configuration changes.

    As far as forcing DOUT/DRDY low, you can follow the diagram in Figure 67 of the latest ADS1120 datasheet.  This figures describes how to force DOUT/DRDY high, but as you can see this requires 16 additional SCLKs.  Note that if 8 additional SCLKs are sent instead of 16, the DOUT/DRDY will be low.

    When sending SCLKs to the ADS1120, always send in byte increments (8 SCLKs).

    Best regards,

    Bob B

  • Hi Bob

    Thank you for your reply.

    I'm sorry, I mistook the meaning of the following question.
    >Are there any case the DOUT would be high after /CS is low?
    Correctly, I want to know if there is a case the DOUT to be low after /CS when powered up.

    >As far as device power up is concerned, there can be no changes to the operation.
    >On power up the ADS1120 will take one conversion and power down as the default mode is single-shot operation.
    >The DOUT/DRDY behavior will always be the same until the device configuration changes.
    The above statement might be the answer that we want to know.

    We are assuming following flow.

    ①Power On Reset
    ②Wait for td(CSSC)
    ③Resister Configuration
    -> Changing the register(DRDY = 0, gain, mux...) but single-shot mode selected.
    ④One conversion
    ⑤Power down automatically

    According to your answer and the datasheet (from Page 39 chapter 8.5.6), I understand as follows.
    -When /CS goes low, the DOUT pin immediately drives either high or low.
    -The behavior of DOUT/DRDY will always be the same until the device configuration changes.

    So, in our case, the DOUT drives high like following.

    Does ADS1120 have individual difference for this behavior per device?
    (For example, "A" device might drive HIGH but "B" device might drive LOW, it won't be defined)

    BestRegards

  • Hi na na 78,

    All devices will respond the same way at startup.  Any difference will depend on the configuration settings used.

    In my previous post I asked for all the register settings being used as this will determine the outcome.  For example, if the DRDYM bit is set, then the DOUT/DRDY will follow the action of DRDY.  If this DRDYM bit is set, than after the conversion has completed the DOUT/DRDY will go low.

    When power is first applied to the ADS1120 and the RESET command is given, the device operation and configuration registers will be in the default operating state.  If the device configuration changes before the first conversion after RESET has completed then the conversion will restart. 

    If CS is high, then DOUT/DRDY will be in a high impedance state (not driven).  When CS goes low, DOUT/DRDY will be driven to the state in the device output shift register.  The output could be either high or low depending on the state of the last bit shifted out or the setting of the DRDYM bit.

    It is not clear to me if I'm answering your questions.  Are you most concerned about what happens to DOUT/DRDY after power up?  Or what happens to DOUT/DRDY after the next START command is issue?  When exactly do you wish to see DOUT/DRDY low?

    Best regards,

    Bob B

  • Hi Bob

    Thank you for your reply.

    >All devices will respond the same way at startup.
    I got it.
    Configuration registers would be default setting because DOUT(our waveform) is measured when the startup.

    Let me close this thread.

    Thanks.

    BestRegards