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DAC7821: DAC7821 Verf input before VDD

Part Number: DAC7821
Other Parts Discussed in Thread: OPA725, OPA277

Hi Team,

One of customer designed DAC7821 and OPA725 refer typical application in datasheet.
They found abnormal singal waveform during the power on even if no input to DAC7821.
They input -1.8V to VREF frist and input 2.5V to VDD.
Is this critical impact to abnormal signal output during the power on?
Thank you.

Best Regards,
Jade

  • Hi Jade,

    Thank you for your query. Before answering your question, I would like to know which circuit in the datasheet you are referring to - is it Figure 26? Secondly, could you explain a bit more about the abnormal signal waveform characteristics - may be a scope capture will be best.

    Regards,
    Uttam Sahu
    Applications Engineer, Precision DACs
  • Hi Uttam,

    Theu refered figure 27.
    They used OPA725 instead of OPA277.
    I attached abnormal signal and power sequence capture file.

    <Vref and VDD>
    Vref 4ms faster than VDD.

    <Abnormal signal>



    1. 300mV below ground for around 3mS
    2.  Pulse of 2.6V during 0.2mS
    3. Back to normal 0V 4.5mS
    4. When supply voltage reaches normal level the output is normal at 1.8V


    Thank you.

    Best Regards,
    Jade

  • Hi Jade,

    I am checking with the design team. Will get back once I find an answer.

    Regards,
    Uttam
  • Hi Jade,

    I got the response from the design team. It is as follows.

    This is the power-on glitch. At the time these devices were done, power-on glitch was not a major specification and thus not specified in the datasheet. As for the customer issue, it will be best to have the VDD applied before VREF for best output results. When VDD is off, and a negative VREF voltage is applied, it will create a output voltage as the customer is seeing. For best startup glitch, it would be recommended to have VDD applied before VREF.

    Hope that answers your question.

    Regards,
    Uttam