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DAC3151EVM: Interfacing DAC 3151 with Mbed microcontroller: DAC3151 Bill of materials, etc.

Raymond LeFebvre
Prodigy 10 points

Part Number: DAC3151EVM

Hello,

I am currently a student in electrical engineering at a large unchversity studying the interfacing of faster Digital to Analog converters with microcontrollers to speed up changes in analog output voltage. I am using the Mbed to generate voltages at the Mbed output pins corresponding to the 10 bit binary number, which is then converted to an output voltage or current. The DAC 3151 EVM evaluation board is currently out of my budget, and the datasheets provided for the DAC3151 and DAC3151 EVM are not revealing as to how to interface the DAC 3151 effectively with my output pins. None of the through hole package DACs had a sampling rate fast enough to match the speed the output pins (sample change every ~20 nanoseconds). 

Is it possible to obtain a bill of materials for the DAC3151 EVM? I'm also interested in hearing tips about other ways to interface the DAC3151 with my output pins, without having to purchase the evaluation board.

Regards,

Raymond

  • 0
    TI__Mastermind 29220 points

    Hi,

    the bill of materials spreadsheet is in the physical design package that is available on the TI web page for the DAC3151 EVM.  The physical design package is a zip file that can be downloaded that contains the schematic, bill of materials, layout information, fab and assembly drawing, etc.  The Design Package zip file has within it some more zip files, one of which is the ASY (assembly) zip file which contains the bill of materials.

    Regarding the interface to drive the DAC - am I to conclude you wish to operate at 50 Msps if your samples change every 20ns?   The digital interface into the DAC3151 is an LVDS interface and the timing of the sample bus is as shown in Figure 4 of the datasheet.  You would have to provide 10 LVDS data signals plus an LVDS clock at the desired sample rate for the digital sample bus.   In addition, the device will require an LVPECL sample clock at the same frequency as the DATACLK.    Being LVDS or LVPECL, all of these signals are differential.    In the case of the DAC3151 EVM, the connector on the EVM is made to connect to the TSW1400 FPGA-based pattern generator to drive the sample data into the DAC.    if you are using some other platform for the source of your sample data, then you would probably need to design and build some bridge hardware to connect on one side to your source of data and connect on the other side to the DAC EVM.  If the source of your sample data were not LVDS then there would likely be some devices to translate the data format into that which is needed by the DAC3151.  But I suspect clocking would be more of an issue.  you would need to have a source for your sample clock to the DAC such as an LVPECL driver, as well as a copy of this same clock in LVDS that would clock the sample data into the DAC.     Most commonly there would be a clock chip such as what is on the EVM which drives a sample clock to the DAC and a copy of that clock to the connector over to the FPGA board, where the FPGA then takes that clock input to use to generate the clock/data bus back to the DAC.

    Regards,

    Richard P.