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DAC8871: settling time from +10V to -10V

Guru 20090 points
Part Number: DAC8871
Other Parts Discussed in Thread: OPA211, THS4011, OPA211A, THS4304, OPA277

Hello,

In the customer, the settling time from +10V to -10V is about 15us.



-10V to 10V settling time is about 1us.


In the datasheet, both settling time is about 1us.
Could you please let me know this reason and how to improvement this operation?

Their opamp is same with DAC8871EVM. There is difference the filter or compensation only.
I can send the schematics if you contacted the following my e-mail.

asaka-r@clv.macnica.co.jp

Best Regards,
Ryuji

  • Hi Ryuji,

    Thank you for your query. The bias current compensation resistor 6.2k in the feedback path of OPA211 will provide better DC performance. However, as it causes instability to the opamp, you will need to add the compensation capacitor and in turn, AC performance will be hampered. If you need AC performance, you can remove this resistor and use an opamp that has higher bandwidth like THS4011 instead of precision opamps like OPA211. Please note that achieving both DC and AC performance with the same circuit is very difficult. Hence, the right trade-off needs to be done.

    Hope I have answered your question.

    Regards,
    Uttam Sahu
    Applications Engineer, Precision DACs
  • Hello Utam san,

    Thank you for the reply.
    These waveform measured at DAC output pin.
    Also they use compensation capacitor 3pf to OPA211 feedback resistor.

    In the datasheet there is the settling time waveform as figure 35 and 36.
    And these settling time is about 1us.
    Could you please let me know the measurement schematics and setting of these data?

    In the DAC8871EVM, the OPA211 feedback if resistor 6.2kohm only. There is no compensation capacitor.
    Does this EVM operate stably?

    Best Regards,
    Ryuji

  • Hello Uttam san,

    Sorry for bothering you but I'm looking forward to your reply.

    Best Regards,
    Ryuji
  • Hi Ryuji-san,

    My apologies for the delay. As I had mentioned earlier, the EVM is mainly designed for DC performance evaluation and hence, it is not a godd idea to test settling time in a similar circuit. In case you have used OPA211 in your circuit, you can replace it with a high-speed opamp like THS4011 in order to get better settling time. Please note that you need to use a high-speed oscilloscope and probes for measuring this parameter. I think THS4011 is pin-2-pin with OPA211. You can replace and test again.

    As the DAC is unbuffered, it is better to check the settling time after the opamp.

    Regards,
    Uttam
  • Hello Uttam san,

    Thank you for your support.

    Unfortunately , our customer use OPA211A VSSOP package...
    Are there other recommended p2p device?
    Also, can be left floating the power pad of THS4011? 

    Also they measured the waveform at DAC output and Opamp output.
    As a result the waveform is almost same.
    Thus I thought that the problem was not occurred due to OPAmp.
    Since the DAC output is unbeffered , is this problem occured due to OPamp?



    Also, Could you please let me know the measurement setting of figure 35 in the datasheet is you can share with us?
    I would like to compare the setting between the customer and the datasheet.

    Best Regards,
    Ryuji

  • Hi Ryuji,

    You can use THS4304. It's P2P with OPA211A. As you are getting a large settling before the output buffer itself, could you please send the reference buffer schematics as it will also affect the output settling?

    Regards,
    Uttam
  • Hello Uttam san,

    I appreciate your help.
    I attache the reference buffer schematics and waveform of VREFL-F and Vout.
    Our customer change the filter value and get the waveform.
    The problem is improved but not solved yet.

    dac8871.pdf

    I requested to change the filter as the following.
    1.Left side C: DNI, Right side C:1nF
    2.Left side C: DNI, Right side C:1~10uF
    3.filter CR removed

    I would appreciate it if you would recommend other method to solve this issue if there is.

    Best Regards,
    Ryuji

  • Hi Ryuji-san,

    You can follow the steps below to get the best performance. I am sorry that it will be little iterative as we don't have the exact equivalent circuit of the DAC reference inputs, which would have helped us simulate the behavior.

    1. Remove the capacitive loads from the reference force pins and check the stability and settling time while keeping the feedback capacitors low
    2. If there are oscillations, start wil a small capacitive load and try to stabilize the load using the feedback capacitor and then see the settling time

    Regards,
    Uttam
  • Hi Ryuji-san,

    You can consider doing a stability analysis using Tina with the OPA277 model befor the experiment so that you don't need to go through many hardware changes. You can consider the force and sense pins as just wires for simplicity.

    Please look at the following E2E post for details: e2e.ti.com/.../1842475

    You can also look at the TI Precision Labs Stability section training slides.

    Regards,
    Uttam
  • Hi Uttam san,

    I appreciate your help.
    I will check the OPA277 model and operation.

    Best regards,
    Ryuji