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DAC104S085: About power on reset

Part Number: DAC104S085

Hi,

I'd like to confirm DAC104S085 about power on reset. Then, according to the datasheet Figure 38, the output is about 500mV at  VIN≒1.8V. Could the output  be always 0V during power up?

Best Regards,

Toshiyuki

  • Hi Toshiyuki-san,

    Thank you for your query. The power-on glitch is not completely avoidable on a DAC as it occurs when the power supply is ramping up. However, the amplitude and duration can be minimized using an external circuit. You can look at the following materials to get more insight into the power-on glitch:

    training.ti.com/lessons-precision-dacs-power-glitch
    www.techbriefs.com/.../21863

    Regards,
    Uttam Sahu
    Applications Engineer, Precision DACs
  • Hi Uttam -san,

    Thank you for your reply. If the rise-time of VA supply is about 1ms, how is the DAC output? What voltage does the DAC output? If we put a large capacitance for DAC output, is the power on glitch avoidable ?

    Best Regards,

    Toshiyuki

  • Hi Toshiyuki-san,

    We don't have a curve for power supply ramp vs power-on glitch. It is also a bit difficult to simulate this condition accurately.

    If you put a large capacitor (within the maximum spec of the DAC) the glitch amplitude will reduce but the energy will remain same. So, the glitch duration will increase. In order to reduce both amplitude and duration (i.e. total energy) you would require an RC circuit so that the energy gets dissipated across the resistor.

    Another way is to sequence the power supplies is such a way that the DAC load circuit is powered after the DAC glitch is gone - so power up the DAC first and then the load circuit. In this way, that circuit will never respond to the glitch.

    If you can provide more details on your requirement, we can suggest suitable solutions.

    Regards,
    Uttam
  • Closing this thread as we are tracking this thread over email.

    Regards,
    Uttam