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DAC5652A: How about IOUT

Part Number: DAC5652A
Other Parts Discussed in Thread: DAC5652

Hello,

Our customer have some question about the DAC5652A.

When after power on and before output code setting,

how about the IOUT? Is it OFF?

One more question.

At first, it operates once output code setting. Then the customer 

toggle the SLEEP pin as High and Low. Now it is restart. The customer don't set the new code.

How about the IOUT? Is it OFF or remain the output code?

Best Regards,

Naoki Aoyama

  • Hi Naoki,

    We are taking a look at your questions, and will be back with you soon.

    Best Regards,

    Dan
  • Hello Dan,

    Is there any update?

    Regards,

    Naoki Aoyama
  • Hi Naoki,

    When after power on and before output code setting, how about the IOUT? Is it OFF?
    Ans. No the DAC output is not off if the clock is running and there is any noise on the input DATA LINES DAC might output garbage data.


    At first, it operates once output code setting. Then the customer toggle the SLEEP pin as High and Low. Now it is restart. The customer don't set the new code. How about the IOUT? Is it OFF or remain the output code?

    During sleep mode there is no output the DAC will not output anything.

    Regards,
    Neeraj Gill
  • Hello Neeraj,

    Thank you for your reply.
    I see it might output garbage data at after power on.

    Is the DAC5652A initialized by SLEEP toggling?

    Regards,
    Naoki Aoyama
  • Hello,

    I want to reconfirm your answer.
    >No the DAC output is not off if the clock is running
    How about if the clock is stopping?

    Regards,
    Naoki Aoyama
  • Hi Naoki,

    1. The customer would like to know the state of IOUT just after DVDD and AVDD power up before writing any digital data. It means no CLK and no WRT edge is supplied. However, I’ve seen several voltages on TI DAC5652EVM as shown in the figures below… What is the initial state of IOUT just after power up before data writing?

    Right after power up, if no clock no data is applied to DAC it output 10mA of DC current. Which is what you are seeing 24.9ohms x 10mA = 249mV. The DAC is outputting  different value when AVDD and DVDD are not turned on together. If you put the jumper on W9 which will short the AVDD and DVDD. And apply voltage to AVDD you will see your DAC will consistently output same current hence same output voltage. (Since you are using DAC5652 not the DAC5652A version the AVDD and DVDD rails have to comeup at the same time.)

    2. The customer would like to know the state of IOUT just after negating SLEEP and no data writing(no CLK or no WRT). I’ve also check it on TI DAC5652EVM with stopping clock input of the EVM and it looks the last written data before asserting SLEEP shall keep being converted. Is this correct understanding?

    Yes once the DATA has been latched into the DAC and the clock is removed from the DAC. The DAC will still output the last data that was  latched into the DAC, until new data is latched into the DAC with WRT signal and the output of the DAC will be update after the fifth clock cycle.

    Regards,

    Neeraj