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ADS1281: about tDR

NAOKI AOYAMA
Guru 11215 points
Part Number: ADS1281

Hello,

I want to check about the tDR.

Refer to the Table 25 on the datasheet, when the fDATA=8ksps, the tDR=2824 x fCLK.

It means the tDR= 0.689ms using fCLK=4.096MHz.

Is it correct?

Best Regards,

Naoki Aoyama

  • 0
    TI__Mastermind 44550 points
    Hi Naoki-san,

    That is correct. Note that "tDR" is the time to the first conversion result when beginning a new conversion. After the first conversion result, /DRDY will have a period of 1/fdata or 125ms (for the 8 kSPS data rate).

    The reason for the ~5x latency on the first conversion result is that the SINC5 filter requires 5 conversions to complete before the output result is valid (settled).

    Best regards,
    Chris
  • 0 in reply to Christopher Hall
    Guru 11215 points
    Hi Chris,

    Thank you for your reply.
    I understood the first conversion result delay.
    It is difficult to understand the digital filter....

    Thanks,
    Naoki Aoyama