TSW14J10EVM-CB for Xilinx zc706 board

Hello Brian,

Ok, I download package.

Is it possible create project for Windows-7 environment Vivado 2016.1?

Do you have a full Vivado project for zc706?

Thanks,

Kiman

Hello,

Vivado 2016.4 is working all all.

Thank you!
Kiman

Hello,

The HSDA converter Pro v4.80 doesn't support ADS54J66  ?

I can't select ADC board for ADS54J66.

My setup is:

ADS54J66 FMC, TSW14J10EVM and Xilinx zc706  evm board.

Thanks,

Kiman

Hi Jim,

Sorry! I just read your response, I will test soon.

Thanks,

Kiman

Hi Jim,

I tried test with a new configuration file, but found DDR read timeout error.

Board detection is fine, and I can see ADS54J66_LMF4421

AD54J66 board configuration file:

LMK_Config_LMF_4421_491p52_MSPS.cfg

ADS58J63_burst_mode_8_bypass.cfg

ADC board DC supply voltage is 5V, current is 1.343A

zc706 FPGA board LED L,C,R is blinking after bitstream file loading.

 

7510.ZC706 ADS54J66 4421 Setup.pptx4188.ADS54J66_LMF_4421.iniKiman,

Please follow the start up guide attached and let me know that you can get a valid capture with this setup. I just tested this with our hardware with no problems.

Regards,

Jim

Hi Jim,

Yes, It's working followed your procedure.

I did additional test with different bitstrim file and all working.
1) different bitstream file
TSW14J10_ZC706__v2p8.bit
ZC706__2_8_000.bit
VIVADO 2016.4 generated.bit


Also I did switched different ADC configuration mode.

2) ADS54xJ6x_* configuration files

Below configuration files were working good with HSDC software
ADS5xJ6x_2x_LPF_mode_2.cfg
ADS5xJ6x_2x_HPF_mode_2.cfg
ADS5xJ6x_2x_N_4_Fs_16_mode_4.cfg
ADS5xJ6x_4x_N_3_Fs_16_mode_6.cfg
ADS5xJ6x_2x_N_6_Fs_16_mode_4.cfg
ADS5xJ6x_4x_N_2_Fs_16_mode_6_4841.cfg



But below configuration files doesn't working (DDR read timeout)
ADS5xJ6x_2x_Fs_4_mode_0.cfg
ADS5xJ6x_2x_N_4_Fs_16_mode_7.cfg
ADS5xJ6x_2x_N_6_Fs_16_mode_5.cfg
my_mode8_burst_mode.cfg


Do you known some modes are not working?
I am interested of the mode 8 burst mode for my application.


Thanks,
Kiman

Kiman,

I think the issue is with the clocks going to the FPGA. The Xilinx firmware requires two clocks. Please take a look at the TSW14J10EVM User's Guide for more information regarding these two clocks and how to them to the correct frequency..

Regards,

Jim

Hi Jim,

Yes, It is working now.


But I loaded a new configuration files for test but these configurations are not working.
ADS5xJ6x_2x_Fs_4_mode_0.cfg
ADS5xJ6x_2x_N_6_Fs_16_mode_5.cfg
ADS5xJ6x_2x_N_4_Fs_16_mode_7.cfg - 500 MHz output rate
and Mode-8 - 500 MHz output rate.


Below configuration files are working with HSDCP software package.
ADS5xJ6x_2x_LPF_mode_2.cfg
ADS5xJ6x_2x_HPF_mode_2.cfg
ADS5xJ6x_2x_N_4_Fs_16_mode_4.cfg
ADS5xJ6x_4x_N_3_Fs_16_mode_6.cfg
ADS5xJ6x_2x_N_6_Fs_16_mode_4.cfg
ADS5xJ6x_4x_N_2_Fs_16_mode_6_4841.cfg


z706 reference design support only 350 MHz output rate?

Thanks,
Kiman

Kiman,

Can you tell me the sample rate used for the modes that do not work and the LMK output clock dividers used along with the SYSREF divider? What config file is loaded for the LMK device?

Regards,

Jim 

Hi Jim,

I used LMK_Config_LMF_4421_491p52_MSPS.cfg and My own external clock configuration file.

I am interested of the mode-8 default mode 500MHz output rate for my application.

ADC sampling clock : ~500 MHz

SYSREF =  ~250 MHz

FMC clocks = ~125 MHz

Thanks,

Kiman

Hi Jim,

zc706 board the LED status:
#L = LEFT Y21 LED_refclk - Blinking
#C = CENTER G2 LED_coreclk - Blinking
#R = RIGHT W21 LED_sysclk - Blinking
#0 = LED_0 A17 LED_reset - OFF

I think all three clocks looks OK.

Thanks,
Kiman

Hi Jim,

Some reason, my zc706 board and AD54J66 reference design doesn't work properly with HSDC Pro.

Good progress is yesterday I did readout 250MHz with several configuration mode but 500 Mhz mode-8 is not working.

If you can work with your setup please send your all configuration file.

Thank you for your support and have a good weekend.