Hi,
Is there any possibility that the offset error will increase by the board layout situation,
in addition to the offset error which the DDC1128 inherently has between the integrators Side A and Side B?
Thanks
Go
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Hi,
Is there any possibility that the offset error will increase by the board layout situation,
in addition to the offset error which the DDC1128 inherently has between the integrators Side A and Side B?
Thanks
Go