I'm having an issues in reading the data from mentioned ADC. It is custom board with several ADCs running the same SCLK,CS but each has its own SDOx. FPGA is controlling SCLK and CS in the manner described in the datasheet of the ADS7056, and scoping signals show same data clocking as the described in the datasheet. I'm not going to trouble you with the code, it is pretty simple one, but I'd like to know if there is some HDL code available for testing single ADC that you used for evaluation maybe? If existing, can you share to check the difference?