AMC1203: AMC1203 MOUT period

Hi Lenna,

Thank you for the great AMC1203 questions here.  Please see below and feel free to contact me if there is anything you do not understand.

Lenna Yan said:

1. When the input voltage is zero, then what's the period of MOUT?

Please review Figure 2 (page 8) and the Timing Characteristics Table below it.  The period of DOUT is the same as MCLK.  With 0V in or shorted inputs, the ones density is 50%.

Lenna Yan said:

2. And what is the corresponding period when the input voltage is extended to +280mV and -280mV?

Please review Figure 2 (page 8) and the Figure 27 (page 15).  The period of DOUT does not change, however, as you increase the voltage towards FS+ or FS-, the ones density increases or decreases accordingly. 

Lenna Yan said:

3. The period of MOUT is constant or variable?

Please review Figure 2 (page 8) and the Timing Characteristics Table below it.  The period of DOUT is constant.

Lenna Yan said:

4. what's the relationship between input voltage and MOUT duty cycle?

There is no relationship, the MOUT duty cycle does not change, the one's density changes - see above.  You have to look at this in two different ways - 'MOUT' is a series of 1's and 0's, the individual bits have no duty cycle variation, they are 100% '0' or 100% '1' on a bit-by-bit basis.  However, when you look at the bit-stream (for example, a series of 100 MOUT bits), you can think of it as a duty cycle.  With 0Vin, there are going to be (on average) 50 zeros and 50 ones - i.e. a 50/50 duty cycle or 50% one's density.  Take a look at the Digital Output section of the datasheet, page 15.