Hello,
I would like you to confirm about below.
* Could you please tell us allowable source(input) impedance ?
We would like to input voltage which is devided by resistor to CHx.
However, there is no spec about source impedance. So, we are not sure how many resistor value should be allowable.
Best Regards,
Ryuuichi,
The input to this device is a switched capacitor input. So the input impedance is actually a dynamic impedance (i.e. it changes as the input capacitor charges up). Each time the ADC converts analog to digital the internal sample and hold capacitor Csh will be charged up. To get an accurate conversion result the capacitor needs to be charged to ½ of an LSB. If the capacitor is not sufficiently charged up it will appear as though the input voltage is really lower than it actually is. Once the capacitor is fully charged up, the input impedance of the SAR is very high. So, the size of impedance that can be connected to the input of the ADC depends on the internal capacitance and charge time allowed. The info below shows how to calculate this maximum impedance.
The switch S1 is closed for each conversion during the acquisition phase. The minimum acquisition time for this converter is 1.5us (for a 200ksps sampling rate). For slower sampling rates the acquisition time will be longer. For the purposes of your question I will assume that you are sampling at 200ksps.
So, the answer to your question is that the largest source impedance needs to be small enough to allow the sample and hold capacitor Csh (25pF from data sheet) to fully charge up during the 1.5us acquisition period. In this case solving the RC charge equation shows that a 6.6k ohm resistor could be used to fully charge during the 1.5us acquisition phase. Below is the math and example circuit. Keep in mind that if you use an amplifier to drive the input, you may be able to achieve better results using an RC filter on the front end. I suggest you review TI Precision Labs on SAR ADC Front End Component Selection video series for more details.
