ADS1120: About Power-supply Sequencing

Hi Tachibana-san,

See my responses below.

Best regards,

Bob B

Masanori Tachibana said:

Part Number: ADS1120

 Hi support team,

On page 60 of the data sheet there is a description of Section 10.1 "Power-Supply Sequencing".
According to it, If AVDD ramps before DVDD, then the low-side switch is in an unknown state and can short the AIN3/REFN1 input to AVSS until DVDD has ramped.

[Question]
- If AVDD ramps before DVDD, will AIN / REFN 1 and AVSS be always short-circuited? [Bob] Not necessarily. The issue occurs due to a random startup state that is not defined until the power-on reset (POR) takes place to synchronize the analog and digital pathways.  If both supplies ramp together there should be no issue.
- Is this short circuit always solved when DVDD comes up? [Bob] The short answer is yes.  The issue is resolved when the ADS1120 has released from POR.  For this to happen AVDD and DVDD need to be in a powered state.  If DVDD comes up first the digital circuitry will not be in a random state, but rather in a reset state which will hold the analog circuitry in a known state while AVDD powers up.  
Or is there any case not to be solved??
- If the above short circuit can be tolerated, may AVDD be ramped up before DVDD? [Bob] Yes this is ok to do.  Where there is an issue is when an unused AIN3 input is tied directly to AVDD.  This could then be a direct power to ground short.  In this case it would be recommended to tie the unused AIN3 input high through a weak pullup resistor (47k to 100k) or leave the input floating.
- Regardless of the order of power-up, if only the communication is started 50 μs after stabilization of all the power supply, does no problem occur at all? [Bob] The issue has nothing to do with communication, but is a factor of logic states at power up.  Once both supplies are at nominal (or if DVDD comes up first) the issue is no longer present.

Sincerely,
M. Tachibana